Searched refs:UPHY_PLL_P0_CTL4_PLL0_REFCLK_SEL (Results 1 – 1 of 1) sorted by relevance
240 #define UPHY_PLL_P0_CTL4_PLL0_REFCLK_SEL(x) (((x) & 0xF) << 4) macro598 reg &= ~UPHY_PLL_P0_CTL4_PLL0_REFCLK_SEL(~0); in uphy_pex_enable()