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Searched refs:UADDSAT (Results 1 – 24 of 24) sorted by relevance

/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h348 UADDSAT, enumerator
H A DTargetLowering.h2903 case ISD::UADDSAT: in isCommutativeBinOp()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86TargetTransformInfo.cpp3601 { ISD::UADDSAT, MVT::v32i16, { 1 } }, in getIntrinsicInstrCost()
3602 { ISD::UADDSAT, MVT::v64i8, { 1 } }, in getIntrinsicInstrCost()
3685 { ISD::UADDSAT, MVT::v16i32, { 3 } }, // not + pminud + paddd in getIntrinsicInstrCost()
3686 { ISD::UADDSAT, MVT::v2i64, { 3 } }, // not + pminuq + paddq in getIntrinsicInstrCost()
3687 { ISD::UADDSAT, MVT::v4i64, { 3 } }, // not + pminuq + paddq in getIntrinsicInstrCost()
3688 { ISD::UADDSAT, MVT::v8i64, { 3 } }, // not + pminuq + paddq in getIntrinsicInstrCost()
3693 { ISD::UADDSAT, MVT::v32i16, { 2 } }, in getIntrinsicInstrCost()
3694 { ISD::UADDSAT, MVT::v64i8, { 2 } }, in getIntrinsicInstrCost()
3814 { ISD::UADDSAT, MVT::v16i16, { 1 } }, in getIntrinsicInstrCost()
3815 { ISD::UADDSAT, MVT::v32i8, { 1 } }, in getIntrinsicInstrCost()
[all …]
H A DX86ISelLowering.cpp1133 setOperationAction(ISD::UADDSAT, MVT::v16i8, Legal); in X86TargetLowering()
1137 setOperationAction(ISD::UADDSAT, MVT::v8i16, Legal); in X86TargetLowering()
1356 setOperationAction(ISD::UADDSAT, MVT::v4i32, Custom); in X86TargetLowering()
1398 setOperationAction(ISD::UADDSAT, MVT::v2i64, Custom); in X86TargetLowering()
1585 setOperationAction(ISD::UADDSAT, MVT::v32i8, HasInt256 ? Legal : Custom); in X86TargetLowering()
1589 setOperationAction(ISD::UADDSAT, MVT::v16i16, HasInt256 ? Legal : Custom); in X86TargetLowering()
1593 setOperationAction(ISD::UADDSAT, MVT::v8i32, Custom); in X86TargetLowering()
1595 setOperationAction(ISD::UADDSAT, MVT::v4i64, Custom); in X86TargetLowering()
1962 setOperationAction(ISD::UADDSAT, VT, HasBWI ? Legal : Custom); in X86TargetLowering()
32479 case ISD::UADDSAT: in LowerOperation()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp358 case ISD::UADDSAT: return "uaddsat"; in getOperationName()
H A DLegalizeVectorOps.cpp450 case ISD::UADDSAT: in LegalizeOp()
1042 case ISD::UADDSAT: in Expand()
H A DLegalizeIntegerTypes.cpp229 case ISD::UADDSAT: in PromoteIntegerResult()
1056 } else if (Opcode == ISD::UADDSAT || Opcode == ISD::USUBSAT) { in PromoteIntRes_ADDSUBSHLSAT()
1066 if (Opcode == ISD::UADDSAT) { in PromoteIntRes_ADDSUBSHLSAT()
2902 case ISD::UADDSAT: in ExpandIntegerResult()
H A DSelectionDAG.cpp5258 case ISD::UADDSAT: in canCreateUndefOrPoison()
5555 case ISD::UADDSAT: in isKnownNeverZero()
6271 case ISD::UADDSAT: return C1.uadd_sat(C2); in FoldValue()
6979 case ISD::UADDSAT: in getNode()
6986 if (Opcode == ISD::SADDSAT || Opcode == ISD::UADDSAT) in getNode()
7374 case ISD::UADDSAT: in getNode()
H A DLegalizeVectorTypes.cpp156 case ISD::UADDSAT: in ScalarizeVectorResult()
1271 case ISD::UADDSAT: case ISD::VP_UADDSAT: in SplitVectorResult()
4391 case ISD::UADDSAT: case ISD::VP_UADDSAT: in WidenVectorResult()
H A DLegalizeDAG.cpp1151 case ISD::UADDSAT: in LegalizeOp()
3891 case ISD::UADDSAT: in ExpandNode()
H A DTargetLowering.cpp10342 if (Opcode == ISD::UADDSAT && isOperationLegal(ISD::UMIN, VT)) { in expandAddSubSat()
10353 case ISD::UADDSAT: in expandAddSubSat()
10380 if (Opcode == ISD::UADDSAT) { in expandAddSubSat()
H A DSelectionDAGBuilder.cpp7184 setValue(&I, DAG.getNode(ISD::UADDSAT, sdl, Op1.getValueType(), Op1, Op2)); in visitIntrinsicCall()
7947 ISD::UADDSAT, sdl, VecTy, VectorIndex, VectorStep); in visitIntrinsicCall()
H A DDAGCombiner.cpp1842 case ISD::UADDSAT: return visitADDSAT(N); in visit()
12428 if (hasOperation(ISD::UADDSAT, VT)) { in visitVSELECT()
12455 return DAG.getNode(ISD::UADDSAT, DL, VT, OpLHS, OpRHS); in visitVSELECT()
12469 return DAG.getNode(ISD::UADDSAT, DL, VT, OpLHS, OpRHS); in visitVSELECT()
/freebsd/contrib/llvm-project/llvm/include/llvm/IR/
H A DVPIntrinsics.def315 VP_PROPERTY_FUNCTIONAL_SDOPC(UADDSAT)
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp720 ISD::SADDSAT, ISD::UADDSAT, in initActions()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp224 for (auto Opcode : {ISD::SADDSAT, ISD::UADDSAT, ISD::SSUBSAT, ISD::USUBSAT}) in addTypeForNEON()
283 setOperationAction(ISD::UADDSAT, VT, Legal); in addMVEVectorTypes()
1154 setOperationAction(ISD::UADDSAT, MVT::i8, Custom); in ARMTargetLowering()
1156 setOperationAction(ISD::UADDSAT, MVT::i16, Custom); in ARMTargetLowering()
5093 case ISD::UADDSAT: in LowerADDSUBSAT()
5109 case ISD::UADDSAT: in LowerADDSUBSAT()
7881 case ISD::UADDSAT: in IsQRMVEInstruction()
10651 case ISD::UADDSAT: in LowerOperation()
10756 case ISD::UADDSAT: in ReplaceNodeResults()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp286 setOperationAction({ISD::UADDO, ISD::USUBO, ISD::UADDSAT, ISD::USUBSAT}, in RISCVTargetLowering()
294 setOperationAction({ISD::UADDSAT, ISD::USUBSAT}, MVT::i32, Custom); in RISCVTargetLowering()
850 ISD::AVGCEILU, ISD::SADDSAT, ISD::UADDSAT, in RISCVTargetLowering()
1249 ISD::AVGCEILU, ISD::SADDSAT, ISD::UADDSAT, in RISCVTargetLowering()
5975 OP_CASE(UADDSAT) in getRISCVVLOp()
6022 VP_CASE(UADDSAT) // VP_UADDSAT in getRISCVVLOp()
7034 case ISD::UADDSAT: in LowerOperation()
12534 case ISD::UADDSAT: in ReplaceNodeResults()
/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp198 for (auto Op : {ISD::SADDSAT, ISD::UADDSAT}) in WebAssemblyTargetLowering()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.cpp513 setOperationAction({ISD::UADDSAT, ISD::USUBSAT}, MVT::i32, Legal); in SITargetLowering()
553 ISD::UMAX, ISD::UADDSAT, ISD::USUBSAT}, in SITargetLowering()
776 ISD::UADDSAT, ISD::USUBSAT, ISD::SADDSAT, ISD::SSUBSAT}, in SITargetLowering()
795 ISD::UMAX, ISD::UADDSAT, ISD::SADDSAT, ISD::USUBSAT, in SITargetLowering()
5858 case ISD::UADDSAT: in LowerOperation()
H A DAMDGPUISelLowering.cpp3189 unsigned AddOpc = ZeroUndef ? ISD::ADD : ISD::UADDSAT; in LowerCTLZ_CTTZ()
/freebsd/contrib/llvm-project/llvm/include/llvm/Target/
H A DTargetSelectionDAG.td449 def uaddsat : SDNode<"ISD::UADDSAT" , SDTIntBinOp, [SDNPCommutative]>;
/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp535 ISD::SUBE, ISD::UADDO, ISD::UADDO_CARRY, ISD::UADDSAT, in NVPTXTargetLowering()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp1276 setOperationAction(ISD::UADDSAT, VT, Legal); in AArch64TargetLowering()
1479 setOperationAction(ISD::UADDSAT, VT, Legal); in AArch64TargetLowering()
21428 return convertMergedOpToPredOp(N, ISD::UADDSAT, DAG, true); in performIntrinsicCombine()
21439 return DAG.getNode(ISD::UADDSAT, SDLoc(N), N->getValueType(0), in performIntrinsicCombine()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp779 setOperationAction(ISD::UADDSAT, VT, Legal); in PPCTargetLowering()