| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 344 UADDO, enumerator
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| H A D | TargetLowering.h | 2983 case ISD::UADDO: in isCommutativeBinOp()
3449 if (Opcode != ISD::UADDO) in shouldFormOverflowOp()
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| H A D | SelectionDAGNodes.h | 3376 (Opc == ISD::SADDO || Opc == ISD::UADDO || Opc == ISD::SSUBO ||
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| H A D | BasicTTIImpl.h | 2534 ISD = ISD::UADDO; in getTypeBasedIntrinsicInstrCost()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 119 setOperationAction(ISD::UADDO, VT, Custom); in M68kTargetLowering()
1385 case ISD::UADDO: in LowerOperation()
1540 case ISD::UADDO: in isOverflowArithmetic()
1584 case ISD::UADDO: in lowerOverflowArithmetic()
2466 Cond.getOperand(0).getOpcode() == ISD::UADDO || in LowerBRCOND()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.h | 101 SADDO, SSUBO, UADDO, USUBO, ADDCARRY, SUBCARRY, enumerator
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| H A D | SystemZISelLowering.cpp | 202 setOperationAction(ISD::UADDO, VT, Custom); in SystemZTargetLowering()
279 setOperationAction(ISD::UADDO, MVT::i128, Custom); in SystemZTargetLowering()
4754 case ISD::UADDO: in lowerXALUO()
4791 case ISD::UADDO: in lowerXALUO()
4792 BaseOp = SystemZISD::UADDO; in lowerXALUO()
4817 return Carry.getOpcode() == ISD::UADDO && in isAddCarryChain()
7060 case ISD::UADDO: in LowerOperation()
7403 OPCODE(UADDO); in getTargetNodeName()
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| H A D | SystemZOperators.td | 308 def z_uaddo : SDNode<"SystemZISD::UADDO", SDT_ZBinaryWithFlags>;
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| H A D | SystemZISelDAGToDAG.cpp | 1432 case SystemZISD::UADDO: in tryFoldLoadStoreIntoMemOperand()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeIntegerTypes.cpp | 235 case ISD::UADDO: in PromoteIntegerResult()
1762 unsigned Opcode = N->getOpcode() == ISD::UADDO ? ISD::ADD : ISD::SUB; in PromoteIntRes_UADDSUBO()
3079 case ISD::UADDO: in ExpandIntegerResult()
3592 Lo = DAG.getNode(ISD::UADDO, dl, VTList, LoOps); in ExpandIntRes_ADDSUB()
3633 ISD::UADDO : ISD::USUBO, in ExpandIntRes_ADDSUB()
3643 Lo = DAG.getNode(ISD::UADDO, dl, VTList, LoOps); in ExpandIntRes_ADDSUB()
3774 case ISD::UADDO: in ExpandIntRes_UADDSUBO()
3811 if (N->getOpcode() == ISD::UADDO && isOneConstant(RHS)) { in ExpandIntRes_UADDSUBO()
3817 } else if (N->getOpcode() == ISD::UADDO && isAllOnesConstant(RHS)) { in ExpandIntRes_UADDSUBO()
4726 Lo = DAG.getNode(IsAdd ? ISD::UADDO : ISD::USUBO, dl, VTList, {LHSL, RHSL}); in ExpandIntRes_SADDSUBO()
[all …]
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| H A D | SelectionDAGDumper.cpp | 361 case ISD::UADDO: return "uaddo"; in getOperationName()
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| H A D | LegalizeVectorOps.cpp | 456 case ISD::UADDO: in LegalizeOp()
1159 case ISD::UADDO: in Expand()
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| H A D | SelectionDAG.cpp | 4157 case ISD::UADDO: in computeKnownBits()
4986 case ISD::UADDO: in ComputeNumSignBits()
5588 case ISD::UADDO: in canCreateUndefOrPoison()
10721 case ISD::UADDO: in getNode()
10746 if (Opcode == ISD::UADDO || Opcode == ISD::SADDO) in getNode()
13058 assert((Opcode == ISD::UADDO || Opcode == ISD::SADDO || in UnrollVectorOverflowOp()
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| H A D | DAGCombiner.cpp | 1905 case ISD::UADDO: return visitADDO(N); in visit()
3250 V.getOpcode() != ISD::UADDO && V.getOpcode() != ISD::USUBO) in getAsCarry()
3547 TLI.isOperationLegalOrCustom(ISD::UADDO, N->getValueType(0))) in visitUADDO_CARRY()
3548 return DAG.getNode(ISD::UADDO, DL, N->getVTList(), N0, N1); in visitUADDO_CARRY()
3610 if (Carry1.getOpcode() != ISD::UADDO) in combineUADDO_CARRYDiamond()
3622 } else if (Carry0.getOpcode() == ISD::UADDO && in combineUADDO_CARRYDiamond()
3709 if (Opcode != ISD::UADDO && Opcode != ISD::USUBO) in combineCarryDiamond()
3734 unsigned NewOp = Opcode == ISD::UADDO ? ISD::UADDO_CARRY : ISD::USUBO_CARRY; in combineCarryDiamond()
3787 (N0.getOpcode() == ISD::UADDO && N0.getResNo() == 0 && in visitUADDO_CARRYLike()
5865 return DAG.getNode(IsSigned ? ISD::SADDO : ISD::UADDO, DL, in visitMULO()
[all …]
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| H A D | LegalizeVectorTypes.cpp | 221 case ISD::UADDO: in ScalarizeVectorResult()
1367 case ISD::UADDO: in SplitVectorResult()
4834 case ISD::UADDO: in WidenVectorResult()
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| H A D | TargetLowering.cpp | 8062 Sum = DAG.getNode(ISD::UADDO, dl, VTList, LL, LH); in expandDIVREMByConstant()
9826 DAG.getNode(ISD::UADDO, dl, DAG.getVTList(VT, MVT::i1), {RHS, LHS}); in expandAVG()
10846 OverflowOp = ISD::UADDO; in expandAddSubSat()
11378 bool IsAdd = Node->getOpcode() == ISD::UADDO; in expandUADDSUBO()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 1636 setOperationAction(ISD::UADDO, VT, Custom); in HexagonTargetLowering()
1717 ISD::UADDO, ISD::SSUBO, ISD::USUBO, ISD::SMUL_LOHI, ISD::UMUL_LOHI, in HexagonTargetLowering()
3299 if (Opc == ISD::UADDO) { in LowerUAddSubO()
3396 case ISD::UADDO: in LowerOperation()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 123 setOperationAction(ISD::UADDO, MVT::i32, Custom); in R600TargetLowering()
410 case ISD::UADDO: return LowerUADDSUBO(Op, DAG, ISD::ADD, AMDGPUISD::CARRY); in LowerOperation()
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| H A D | AMDGPUISelDAGToDAG.cpp | 646 case ISD::UADDO: in Select()
1051 bool IsAdd = N->getOpcode() == ISD::UADDO; in SelectUADDO_USUBO()
1072 unsigned Opc = N->getOpcode() == ISD::UADDO ? AMDGPU::S_UADDO_PSEUDO in SelectUADDO_USUBO()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 174 setOperationAction(ISD::UADDO, MVT::i64, Custom); in WebAssemblyTargetLowering()
1691 case ISD::UADDO: in LowerOperation()
1825 assert(Op.getOpcode() == ISD::UADDO); in LowerUADDO()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86TargetTransformInfo.cpp | 4391 { ISD::UADDO, MVT::i64, { 2, 2, 4, 6 } }, in getIntrinsicInstrCost()
4458 { ISD::UADDO, MVT::i32, { 2, 2, 4, 6 } }, in getIntrinsicInstrCost()
4459 { ISD::UADDO, MVT::i16, { 2, 2, 4, 6 } }, in getIntrinsicInstrCost()
4460 { ISD::UADDO, MVT::i8, { 2, 2, 4, 6 } }, in getIntrinsicInstrCost()
4574 ISD = ISD::UADDO; in getIntrinsicInstrCost()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 823 setOperationAction({ISD::SADDO, ISD::SSUBO, ISD::UADDO, ISD::USUBO, in initActions()
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| H A D | CodeGenPrepare.cpp | 1679 if (!TLI->shouldFormOverflowOp(ISD::UADDO, in combineToUAddWithOverflow()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 1145 setOperationAction(ISD::UADDO, MVT::i32, Custom); in ARMTargetLowering()
5012 case ISD::UADDO: in getARMXALUOOp()
5122 case ISD::UADDO: in LowerUnsignedALUO()
5204 (Opc == ISD::SADDO || Opc == ISD::UADDO || Opc == ISD::SSUBO || in LowerSELECT()
5803 (Opc == ISD::SADDO || Opc == ISD::UADDO || Opc == ISD::SSUBO || in LowerBRCOND()
5852 (Opc == ISD::SADDO || Opc == ISD::UADDO || Opc == ISD::SSUBO || in LowerBR_CC()
10707 case ISD::UADDO: in LowerOperation()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 650 ISD::SUBE, ISD::UADDO, ISD::UADDO_CARRY, ISD::UADDSAT, in NVPTXTargetLowering()
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