| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.h | 122 SmallVectorImpl<MachineOperand> &Cond, unsigned &TrueOp,
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| H A D | LanaiInstrInfo.cpp | 441 unsigned &TrueOp, unsigned &FalseOp, in analyzeSelect() argument
449 TrueOp = 1; in analyzeSelect()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelDAGToDAG.cpp | 2012 auto *TrueOp = dyn_cast<ConstantSDNode>(Node->getOperand(0)); in expandSelectBoolean() local
2014 if (!TrueOp || !FalseOp) in expandSelectBoolean()
2018 if (TrueOp->getSExtValue() != 1 && TrueOp->getSExtValue() != -1) in expandSelectBoolean()
2044 unsigned ShiftOp = TrueOp->getSExtValue() == 1 ? ISD::SRL : ISD::SRA; in expandSelectBoolean()
2051 if (TrueOp->getSExtValue() == 1) { in expandSelectBoolean()
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| H A D | SystemZISelLowering.cpp | 3881 Comparison C, SDValue TrueOp, SDValue FalseOp) { in getI128Select() argument
3888 std::swap(TrueOp, FalseOp); in getI128Select()
3911 TrueOp = DAG.getNode(ISD::AND, DL, VT, TrueOp, Mask); in getI128Select()
3913 return DAG.getNode(ISD::OR, DL, VT, TrueOp, FalseOp); in getI128Select()
3920 SDValue TrueOp = Op.getOperand(2); in lowerSELECT_CC() local
3943 if (isAbsolute(C.Op0, TrueOp, FalseOp)) in lowerSELECT_CC()
3944 return getAbsolute(DAG, DL, TrueOp, C.CCMask & SystemZ::CCMASK_CMP_LT); in lowerSELECT_CC()
3945 if (isAbsolute(C.Op0, FalseOp, TrueOp)) in lowerSELECT_CC()
3952 TrueOp.getValueType() == MVT::i128) { in lowerSELECT_CC()
3953 return getI128Select(DAG, DL, C, TrueOp, FalseOp); in lowerSELECT_CC()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfo.h | 151 SmallVectorImpl<MachineOperand> &Cond, unsigned &TrueOp,
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| H A D | RISCVInstrInfo.cpp | 1730 unsigned &TrueOp, unsigned &FalseOp, in analyzeSelect() argument
1741 TrueOp = 5; in analyzeSelect()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | PeepholeOptimizer.cpp | 964 unsigned TrueOp = 0; in optimizeSelect() local
968 if (TII->analyzeSelect(MI, Cond, TrueOp, FalseOp, Optimizable)) in optimizeSelect()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.h | 306 SmallVectorImpl<MachineOperand> &Cond, unsigned &TrueOp,
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| H A D | ARMBaseInstrInfo.cpp | 2164 unsigned &TrueOp, unsigned &FalseOp, in analyzeSelect() argument
2174 TrueOp = 1; in analyzeSelect()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetInstrInfo.h | 1007 unsigned &TrueOp, unsigned &FalseOp, in analyzeSelect() argument
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 49009 SDValue TrueOp = N->getOperand(1); in combineCMov() local
49014 if (TrueOp == FalseOp) in combineCMov()
49015 return TrueOp; in combineCMov()
49024 SDValue Ops[] = {FalseOp, TrueOp, DAG.getTargetConstant(CC, DL, MVT::i8), in combineCMov()
49033 if (ConstantSDNode *TrueC = dyn_cast<ConstantSDNode>(TrueOp)) { in combineCMov()
49040 std::swap(TrueOp, FalseOp); in combineCMov()
49140 std::swap(TrueOp, FalseOp); in combineCMov()
49143 if (CC == X86::COND_E && CmpAgainst == dyn_cast<ConstantSDNode>(TrueOp)) { in combineCMov()
49164 if (Cond0 == TrueOp && Sub1C && Sub1C->getZExtValue() == 2) { in combineCMov()
49171 return DAG.getNode(X86ISD::ADC, DL, DAG.getVTList(VT, MVT::i32), TrueOp, in combineCMov()
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