| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.h | 120 SmallVectorImpl<MachineOperand> &Cond, unsigned &TrueOp,
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| H A D | LanaiInstrInfo.cpp | 440 unsigned &TrueOp, unsigned &FalseOp, in analyzeSelect() argument
448 TrueOp = 1; in analyzeSelect()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelDAGToDAG.cpp | 2001 auto *TrueOp = dyn_cast<ConstantSDNode>(Node->getOperand(0)); in expandSelectBoolean() local
2003 if (!TrueOp || !FalseOp) in expandSelectBoolean()
2007 if (TrueOp->getSExtValue() != 1 && TrueOp->getSExtValue() != -1) in expandSelectBoolean()
2032 unsigned ShiftOp = TrueOp->getSExtValue() == 1 ? ISD::SRL : ISD::SRA; in expandSelectBoolean()
2039 if (TrueOp->getSExtValue() == 1) { in expandSelectBoolean()
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| H A D | SystemZISelLowering.cpp | 3479 SDValue TrueOp = Op.getOperand(2); in lowerSELECT_CC() local
3494 if (isAbsolute(C.Op0, TrueOp, FalseOp)) in lowerSELECT_CC()
3495 return getAbsolute(DAG, DL, TrueOp, C.CCMask & SystemZ::CCMASK_CMP_LT); in lowerSELECT_CC()
3496 if (isAbsolute(C.Op0, FalseOp, TrueOp)) in lowerSELECT_CC()
3501 SDValue Ops[] = {TrueOp, FalseOp, in lowerSELECT_CC()
6675 auto *TrueOp = dyn_cast<ConstantSDNode>(N0.getOperand(0)); in combineZERO_EXTEND() local
6677 if (TrueOp && FalseOp) { in combineZERO_EXTEND()
6679 SDValue Ops[] = { DAG.getConstant(TrueOp->getZExtValue(), DL, VT), in combineZERO_EXTEND()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfo.h | 147 SmallVectorImpl<MachineOperand> &Cond, unsigned &TrueOp,
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| H A D | RISCVInstrInfo.cpp | 1375 unsigned &TrueOp, unsigned &FalseOp, in analyzeSelect() argument
1386 TrueOp = 5; in analyzeSelect()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | PeepholeOptimizer.cpp | 690 unsigned TrueOp = 0; in optimizeSelect() local
694 if (TII->analyzeSelect(MI, Cond, TrueOp, FalseOp, Optimizable)) in optimizeSelect()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.h | 309 SmallVectorImpl<MachineOperand> &Cond, unsigned &TrueOp,
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| H A D | ARMBaseInstrInfo.cpp | 2321 unsigned &TrueOp, unsigned &FalseOp, in analyzeSelect() argument
2331 TrueOp = 1; in analyzeSelect()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetInstrInfo.h | 984 unsigned &TrueOp, unsigned &FalseOp, in analyzeSelect() argument
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 47245 SDValue TrueOp = N->getOperand(1); in combineCMov() local
47250 if (TrueOp == FalseOp) in combineCMov()
47251 return TrueOp; in combineCMov()
47260 SDValue Ops[] = {FalseOp, TrueOp, DAG.getTargetConstant(CC, DL, MVT::i8), in combineCMov()
47269 if (ConstantSDNode *TrueC = dyn_cast<ConstantSDNode>(TrueOp)) { in combineCMov()
47276 std::swap(TrueOp, FalseOp); in combineCMov()
47376 std::swap(TrueOp, FalseOp); in combineCMov()
47380 CmpAgainst == dyn_cast<ConstantSDNode>(TrueOp)) { in combineCMov()
47401 if (Cond0 == TrueOp && Sub1C && Sub1C->getZExtValue() == 2) { in combineCMov()
47410 TrueOp, DAG.getConstant(0, DL, OuterVT), EFLAGS); in combineCMov()
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