Searched refs:TmpReg1 (Results 1 – 4 of 4) sorted by relevance
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCFastISel.cpp | 2174 unsigned TmpReg1 = PPCMaterialize32BitInt(Imm, RC); in PPCMaterialize64BitInt() local 2176 return TmpReg1; in PPCMaterialize64BitInt() 2184 TmpReg2).addReg(TmpReg1).addImm(Shift).addImm(63 - Shift); in PPCMaterialize64BitInt() 2186 TmpReg2 = TmpReg1; in PPCMaterialize64BitInt()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPURegisterBankInfo.cpp | 1855 Register TmpReg1 = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in buildVCopy() local 1861 .addDef(TmpReg1) in buildVCopy() 1867 .addUse(TmpReg1) in buildVCopy() 2903 Register TmpReg1 = MRI.createGenericVirtualRegister(S32); in applyMappingImpl() local 2905 MRI.setRegBank(TmpReg1, AMDGPU::SGPRRegBank); in applyMappingImpl() 2908 Extract1->getOperand(0).setReg(TmpReg1); in applyMappingImpl() 2913 buildVCopy(B, DstRegs[1], TmpReg1); in applyMappingImpl()
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H A D | AMDGPUInstructionSelector.cpp | 2256 Register TmpReg1 = MRI->createVirtualRegister(DstRC); in selectG_TRUNC() local 2275 auto And = BuildMI(*MBB, I, DL, TII.get(AndOpc), TmpReg1) in selectG_TRUNC() 2280 .addReg(TmpReg1); in selectG_TRUNC() 5569 Register TmpReg1 = MRI->createVirtualRegister(&AMDGPU::SReg_32RegClass); in selectNamedBarrierInst() local 5570 BuildMI(*MBB, &I, DL, TII.get(AMDGPU::S_OR_B32), TmpReg1) in selectNamedBarrierInst() 5573 M0Val = TmpReg1; in selectNamedBarrierInst()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64FastISel.cpp | 2589 Register TmpReg1 = createResultReg(&AArch64::GPR32RegClass); in selectCmp() local 2591 TmpReg1) in selectCmp() 2597 .addReg(TmpReg1, getKillRegState(true)) in selectCmp()
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