Searched refs:TmpOffsetVGPR (Results 1 – 1 of 1) sorted by relevance
1379 Register TmpOffsetVGPR; in buildSpillLoadStore() local1405 .addReg(TmpOffsetVGPR); in buildSpillLoadStore()1408 assert(TmpOffsetVGPR); in buildSpillLoadStore()1447 TmpOffsetVGPR = RS->scavengeRegisterBackwards(AMDGPU::VGPR_32RegClass, MI, false, 0); in buildSpillLoadStore()1452 TmpOffsetVGPR = Reg; in buildSpillLoadStore()1458 assert(TmpOffsetVGPR); in buildSpillLoadStore()1489 MaterializeVOffset(ScratchOffsetReg, TmpOffsetVGPR, Offset); in buildSpillLoadStore()1531 if (UseVGPROffset && TmpOffsetVGPR == TmpIntermediateVGPR) { in buildSpillLoadStore()1538 MaterializeVOffset(ScratchOffsetReg, TmpOffsetVGPR, MaterializedOffset); in buildSpillLoadStore()1631 if (!TmpOffsetVGPR) { in buildSpillLoadStore()[all …]