| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/AsmParser/ |
| H A D | PPCAsmParser.cpp | 833 MCInst TmpInst; in processInstruction() local 834 TmpInst.setOpcode((Opcode == PPC::DCBTx || Opcode == PPC::DCBTT) ? in processInstruction() 836 TmpInst.addOperand(MCOperand::createImm( in processInstruction() 838 TmpInst.addOperand(Inst.getOperand(0)); in processInstruction() 839 TmpInst.addOperand(Inst.getOperand(1)); in processInstruction() 840 Inst = TmpInst; in processInstruction() 845 MCInst TmpInst; in processInstruction() local 846 TmpInst.setOpcode(PPC::DCBT); in processInstruction() 847 TmpInst.addOperand(Inst.getOperand(2)); in processInstruction() 848 TmpInst.addOperand(Inst.getOperand(0)); in processInstruction() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 8981 MCInst TmpInst; in processInstruction() local 8982 TmpInst.setOpcode(Opcode); in processInstruction() 8983 TmpInst.addOperand(Inst.getOperand(0)); in processInstruction() 8984 TmpInst.addOperand(Inst.getOperand(1)); in processInstruction() 8985 TmpInst.addOperand(Inst.getOperand(2)); in processInstruction() 8986 TmpInst.addOperand(Inst.getOperand(3)); in processInstruction() 8987 Inst = TmpInst; in processInstruction() 8999 MCInst TmpInst; in processInstruction() local 9000 TmpInst.setOpcode(Opcode); in processInstruction() 9001 TmpInst.addOperand(Inst.getOperand(0)); in processInstruction() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonAsmPrinter.cpp | 334 MCInst TmpInst; in HexagonProcessInstruction() local 336 TmpInst.setOpcode(Hexagon::L2_loadrdgp); in HexagonProcessInstruction() 337 TmpInst.addOperand(Reg); in HexagonProcessInstruction() 338 TmpInst.addOperand(MCOperand::createExpr( in HexagonProcessInstruction() 340 MappedInst = TmpInst; in HexagonProcessInstruction() 351 MCInst TmpInst; in HexagonProcessInstruction() local 353 TmpInst.setOpcode(Hexagon::L2_loadrigp); in HexagonProcessInstruction() 354 TmpInst.addOperand(Reg); in HexagonProcessInstruction() 355 TmpInst.addOperand(MCOperand::createExpr(HexagonMCExpr::create( in HexagonProcessInstruction() 357 MappedInst = TmpInst; in HexagonProcessInstruction() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/MCTargetDesc/ |
| H A D | CSKYMCCodeEmitter.cpp | 255 MCInst TmpInst; in expandJBTF() local 259 TmpInst = in expandJBTF() 263 Binary = getBinaryCodeForInstr(TmpInst, Fixups, STI); in expandJBTF() 267 TmpInst = MCInstBuilder(CSKY::BR32) in expandJBTF() 271 TmpInst = MCInstBuilder(CSKY::JMPI32).addOperand(MI.getOperand(2)); in expandJBTF() 272 Binary = getBinaryCodeForInstr(TmpInst, Fixups, STI); in expandJBTF() 281 MCInst TmpInst; in expandNEG() local 285 TmpInst = MCInstBuilder(Size == 4 ? CSKY::NOT32 : CSKY::NOT16) in expandNEG() 288 Binary = getBinaryCodeForInstr(TmpInst, Fixups, STI); in expandNEG() 291 TmpInst = MCInstBuilder(Size == 4 ? CSKY::ADDI32 : CSKY::ADDI16) in expandNEG() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsTargetStreamer.cpp | 187 MCInst TmpInst; in emitR() local 188 TmpInst.setOpcode(Opcode); in emitR() 189 TmpInst.addOperand(MCOperand::createReg(Reg0)); in emitR() 190 TmpInst.setLoc(IDLoc); in emitR() 191 getStreamer().emitInstruction(TmpInst, *STI); in emitR() 196 MCInst TmpInst; in emitRX() local 197 TmpInst.setOpcode(Opcode); in emitRX() 198 TmpInst.addOperand(MCOperand::createReg(Reg0)); in emitRX() 199 TmpInst.addOperand(Op1); in emitRX() 200 TmpInst.setLoc(IDLoc); in emitRX() [all …]
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| H A D | MipsMCCodeEmitter.cpp | 166 MCInst TmpInst = MI; in encodeInstruction() local 173 LowerLargeShift(TmpInst); in encodeInstruction() 184 LowerCompactBranch(TmpInst); in encodeInstruction() 188 uint32_t Binary = getBinaryCodeForInstr(TmpInst, Fixups, STI); in encodeInstruction() 193 const unsigned Opcode = TmpInst.getOpcode(); in encodeInstruction() 216 TmpInst.setOpcode (NewOpcode); in encodeInstruction() 217 Binary = getBinaryCodeForInstr(TmpInst, Fixups, STI); in encodeInstruction() 227 const MCInstrDesc &Desc = MCII.get(TmpInst.getOpcode()); in encodeInstruction()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/AsmParser/ |
| H A D | HexagonAsmParser.cpp | 1297 MCInst TmpInst; in makeCombineInst() local 1298 TmpInst.setOpcode(opCode); in makeCombineInst() 1299 TmpInst.addOperand(Rdd); in makeCombineInst() 1300 TmpInst.addOperand(MO1); in makeCombineInst() 1301 TmpInst.addOperand(MO2); in makeCombineInst() 1303 return TmpInst; in makeCombineInst() 1449 MCInst TmpInst; in processInstruction() local 1452 TmpInst.setOpcode(Hexagon::C2_cmpeq); in processInstruction() 1453 TmpInst.addOperand(Pd); in processInstruction() 1454 TmpInst.addOperand(Rt); in processInstruction() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiAsmPrinter.cpp | 173 MCInst TmpInst; in emitCallInstruction() local 174 MCInstLowering.Lower(MI, TmpInst); in emitCallInstruction() 175 TmpInst.setOpcode(Lanai::BT); in emitCallInstruction() 176 OutStreamer->emitInstruction(TmpInst, STI); in emitCallInstruction() 190 MCInst TmpInst; in customEmitInstruction() local 191 MCInstLowering.Lower(MI, TmpInst); in customEmitInstruction() 192 OutStreamer->emitInstruction(TmpInst, STI); in customEmitInstruction()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCAsmPrinter.cpp | 812 MCInst TmpInst; in emitInstruction() local 988 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this); in emitInstruction() 990 MCRegister PICR = TmpInst.getOperand(0).getReg(); in emitInstruction() 1015 TmpInst.setOpcode(PPC::LWZ); in emitInstruction() 1020 const MCOperand TR = TmpInst.getOperand(1); in emitInstruction() 1021 const MCOperand PICR = TmpInst.getOperand(0); in emitInstruction() 1024 TmpInst.getOperand(1) = in emitInstruction() 1026 TmpInst.getOperand(0) = TR; in emitInstruction() 1027 TmpInst.getOperand(2) = PICR; in emitInstruction() 1028 EmitToStreamer(*OutStreamer, TmpInst); in emitInstruction() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMAsmPrinter.cpp | 1613 MCInst TmpInst; in emitInstruction() local 1614 TmpInst.setOpcode(Opc == ARM::MOVi16_ga_pcrel? ARM::MOVi16 : ARM::t2MOVi16); in emitInstruction() 1615 TmpInst.addOperand(MCOperand::createReg(MI->getOperand(0).getReg())); in emitInstruction() 1635 TmpInst.addOperand(MCOperand::createExpr(PCRelExpr)); in emitInstruction() 1638 TmpInst.addOperand(MCOperand::createImm(ARMCC::AL)); in emitInstruction() 1639 TmpInst.addOperand(MCOperand::createReg(0)); in emitInstruction() 1641 TmpInst.addOperand(MCOperand::createReg(0)); in emitInstruction() 1642 EmitToStreamer(*OutStreamer, TmpInst); in emitInstruction() 1647 MCInst TmpInst; in emitInstruction() local 1648 TmpInst.setOpcode(Opc == ARM::MOVTi16_ga_pcrel in emitInstruction() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCAsmPrinter.cpp | 66 MCInst TmpInst; in emitInstruction() local 67 MCInstLowering.Lower(MI, TmpInst); in emitInstruction() 68 EmitToStreamer(*OutStreamer, TmpInst); in emitInstruction()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/ |
| H A D | RISCVMCCodeEmitter.cpp | 157 MCInst TmpInst; in expandFunctionCall() local 180 TmpInst = MCInstBuilder(RISCV::AUIPC).addReg(Ra).addExpr(CallExpr); in expandFunctionCall() 181 Binary = getBinaryCodeForInstr(TmpInst, Fixups, STI); in expandFunctionCall() 187 TmpInst = MCInstBuilder(RISCV::JALR).addReg(RISCV::X0).addReg(Ra).addImm(0); in expandFunctionCall() 190 TmpInst = MCInstBuilder(RISCV::JALR).addReg(Ra).addReg(Ra).addImm(0); in expandFunctionCall() 191 Binary = getBinaryCodeForInstr(TmpInst, Fixups, STI); in expandFunctionCall() 238 MCInst TmpInst = MCInstBuilder(RISCV::ADD) in expandAddTPRel() local 242 uint32_t Binary = getBinaryCodeForInstr(TmpInst, Fixups, STI); in expandAddTPRel() 318 MCInst TmpInst = MCInstBuilder(InvOpc).addReg(SrcReg1).addImm(6); in expandLongCondBr() local 319 uint16_t Binary = getBinaryCodeForInstr(TmpInst, Fixups, STI); in expandLongCondBr() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFAsmPrinter.cpp | 144 MCInst TmpInst; in emitInstruction() local 146 if (!BTF || !BTF->InstLower(MI, TmpInst)) { in emitInstruction() 148 MCInstLowering.Lower(MI, TmpInst); in emitInstruction() 150 EmitToStreamer(*OutStreamer, TmpInst); in emitInstruction()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600MCInstLower.cpp | 69 MCInst TmpInst; in emitInstruction() local 70 MCInstLowering.lower(MI, TmpInst); in emitInstruction() 71 EmitToStreamer(*OutStreamer, TmpInst); in emitInstruction()
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| H A D | AMDGPUMCInstLower.cpp | 371 MCInst TmpInst; in emitInstruction() local 372 MCInstLowering.lower(MI, TmpInst); in emitInstruction() 373 EmitToStreamer(*OutStreamer, TmpInst); in emitInstruction() 391 InstEmitter->encodeInstruction(TmpInst, CodeBytes, Fixups, STI); in emitInstruction() 405 InstPrinter.printInst(&TmpInst, 0, StringRef(), STI, DisasmStream); in emitInstruction() 412 TmpInst, CodeBytes, Fixups, MF->getSubtarget<MCSubtargetInfo>()); in emitInstruction()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/AsmParser/ |
| H A D | XtensaAsmParser.cpp | 415 MCInst TmpInst; in processInstruction() local 416 TmpInst.setLoc(IDLoc); in processInstruction() 417 TmpInst.setOpcode(Xtensa::L32R); in processInstruction() 421 TmpInst.addOperand(Inst.getOperand(0)); in processInstruction() 423 TmpInst.addOperand(Op1); in processInstruction() 425 Inst = TmpInst; in processInstruction() 428 MCInst TmpInst; in processInstruction() local 429 TmpInst.setLoc(IDLoc); in processInstruction() 430 TmpInst.setOpcode(Xtensa::L32R); in processInstruction() 434 TmpInst.addOperand(Inst.getOperand(0)); in processInstruction() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/ |
| H A D | MSP430AsmPrinter.cpp | 154 MCInst TmpInst; in emitInstruction() local 155 MCInstLowering.Lower(MI, TmpInst); in emitInstruction() 156 EmitToStreamer(*OutStreamer, TmpInst); in emitInstruction()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/MCTargetDesc/ |
| H A D | LoongArchMCCodeEmitter.cpp | 242 MCInst TmpInst = MCInstBuilder(Opc).addOperand(MI.getOperand(0)).addImm(Imm); in expandToVectorLDI() local 243 uint32_t Binary = getBinaryCodeForInstr(TmpInst, Fixups, STI); in expandToVectorLDI() 271 MCInst TmpInst = in expandAddTPRel() local 273 uint32_t Binary = getBinaryCodeForInstr(TmpInst, Fixups, STI); in expandAddTPRel()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVAsmPrinter.cpp | 271 MCInst TmpInst; in outputInstruction() local 272 MCInstLowering.lower(MI, TmpInst, MAI); in outputInstruction() 273 outputMCInst(TmpInst); in outputInstruction() 365 MCInst TmpInst; in outputEntryPoints() local 366 MCInstLowering.lower(MI, TmpInst, MAI); in outputEntryPoints() 369 TmpInst.addOperand(MCOperand::createReg(Reg)); in outputEntryPoints() 371 outputMCInst(TmpInst); in outputEntryPoints()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchAsmPrinter.cpp | 69 MCInst TmpInst; in emitInstruction() local 70 if (!lowerLoongArchMachineInstrToMCInst(MI, TmpInst, *this)) in emitInstruction() 71 EmitToStreamer(*OutStreamer, TmpInst); in emitInstruction()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/XCore/ |
| H A D | XCoreAsmPrinter.cpp | 287 MCInst TmpInst; in emitInstruction() local 288 MCInstLowering.Lower(MI, TmpInst); in emitInstruction() 290 EmitToStreamer(*OutStreamer, TmpInst); in emitInstruction()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/ |
| H A D | CSKYAsmPrinter.cpp | 164 MCInst TmpInst; in emitInstruction() local 165 MCInstLowering.Lower(MI, TmpInst); in emitInstruction() 166 EmitToStreamer(*OutStreamer, TmpInst); in emitInstruction()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/AsmParser/ |
| H A D | SparcAsmParser.cpp | 705 MCInst TmpInst; in expandSET() local 707 TmpInst.setLoc(IDLoc); in expandSET() 708 TmpInst.setOpcode(SP::SETHIi); in expandSET() 709 TmpInst.addOperand(MCRegOp); in expandSET() 710 TmpInst.addOperand(MCOperand::createExpr(Expr)); in expandSET() 711 Instructions.push_back(TmpInst); in expandSET() 726 MCInst TmpInst; in expandSET() local 732 TmpInst.setLoc(IDLoc); in expandSET() 733 TmpInst.setOpcode(SP::ORri); in expandSET() 734 TmpInst.addOperand(MCRegOp); in expandSET() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64AsmPrinter.cpp | 2839 MCInst TmpInst; in emitInstruction() local 2840 TmpInst.setOpcode(AArch64::MOVIv16b_ns); in emitInstruction() 2841 TmpInst.addOperand(MCOperand::createReg(MI->getOperand(0).getReg())); in emitInstruction() 2842 TmpInst.addOperand(MCOperand::createImm(MI->getOperand(1).getImm())); in emitInstruction() 2843 EmitToStreamer(*OutStreamer, TmpInst); in emitInstruction() 2958 MCInst TmpInst; in emitInstruction() local 2959 TmpInst.setOpcode(Opcodes[Key][IsZero]); in emitInstruction() 2960 TmpInst.addOperand(MCOperand::createReg(Callee)); in emitInstruction() 2962 TmpInst.addOperand(MCOperand::createReg(DiscReg)); in emitInstruction() 2963 EmitToStreamer(*OutStreamer, TmpInst); in emitInstruction() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEAsmPrinter.cpp | 345 MCInst TmpInst; in emitInstruction() local 346 LowerVEMachineInstrToMCInst(&*I, TmpInst, *this); in emitInstruction() 347 EmitToStreamer(*OutStreamer, TmpInst); in emitInstruction()
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