/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/AsmParser/ |
H A D | PPCAsmParser.cpp | 829 MCInst TmpInst; in ProcessInstruction() local 830 TmpInst.setOpcode((Opcode == PPC::DCBTx || Opcode == PPC::DCBTT) ? in ProcessInstruction() 832 TmpInst.addOperand(MCOperand::createImm( in ProcessInstruction() 834 TmpInst.addOperand(Inst.getOperand(0)); in ProcessInstruction() 835 TmpInst.addOperand(Inst.getOperand(1)); in ProcessInstruction() 836 Inst = TmpInst; in ProcessInstruction() 841 MCInst TmpInst; in ProcessInstruction() local 842 TmpInst.setOpcode(PPC::DCBT); in ProcessInstruction() 843 TmpInst.addOperand(Inst.getOperand(2)); in ProcessInstruction() 844 TmpInst.addOperand(Inst.getOperand(0)); in ProcessInstruction() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/ |
H A D | ARMAsmParser.cpp | 8913 MCInst TmpInst; in processInstruction() local 8914 TmpInst.setOpcode(Opcode); in processInstruction() 8915 TmpInst.addOperand(Inst.getOperand(0)); in processInstruction() 8916 TmpInst.addOperand(Inst.getOperand(1)); in processInstruction() 8917 TmpInst.addOperand(Inst.getOperand(2)); in processInstruction() 8918 TmpInst.addOperand(Inst.getOperand(3)); in processInstruction() 8919 Inst = TmpInst; in processInstruction() 8931 MCInst TmpInst; in processInstruction() local 8932 TmpInst.setOpcode(Opcode); in processInstruction() 8933 TmpInst.addOperand(Inst.getOperand(0)); in processInstruction() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/MCTargetDesc/ |
H A D | CSKYMCCodeEmitter.cpp | 72 MCInst TmpInst; in expandJBTF() 76 TmpInst = in expandJBTF() 80 Binary = getBinaryCodeForInstr(TmpInst, Fixups, STI); in expandJBTF() 84 TmpInst = MCInstBuilder(CSKY::BR32) in expandJBTF() 88 TmpInst = MCInstBuilder(CSKY::JMPI32).addOperand(MI.getOperand(2)); in expandJBTF() 89 Binary = getBinaryCodeForInstr(TmpInst, Fixups, STI); in expandJBTF() 98 MCInst TmpInst; in expandNEG() 102 TmpInst = MCInstBuilder(Size == 4 ? CSKY::NOT32 : CSKY::NOT16) in expandNEG() 105 Binary = getBinaryCodeForInstr(TmpInst, Fixups, STI); in expandNEG() 108 TmpInst in expandNEG() 74 MCInst TmpInst; expandJBTF() local 100 MCInst TmpInst; expandNEG() local 122 MCInst TmpInst; expandRSUBI() local 146 MCInst TmpInst; encodeInstruction() local [all...] |
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonAsmPrinter.cpp | 336 MCInst TmpInst; in HexagonProcessInstruction() local 338 TmpInst.setOpcode(Hexagon::L2_loadrdgp); in HexagonProcessInstruction() 339 TmpInst.addOperand(Reg); in HexagonProcessInstruction() 340 TmpInst.addOperand(MCOperand::createExpr( in HexagonProcessInstruction() 342 MappedInst = TmpInst; in HexagonProcessInstruction() 353 MCInst TmpInst; in HexagonProcessInstruction() local 355 TmpInst.setOpcode(Hexagon::L2_loadrigp); in HexagonProcessInstruction() 356 TmpInst.addOperand(Reg); in HexagonProcessInstruction() 357 TmpInst.addOperand(MCOperand::createExpr(HexagonMCExpr::create( in HexagonProcessInstruction() 359 MappedInst = TmpInst; in HexagonProcessInstruction() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
H A D | MipsTargetStreamer.cpp | 177 MCInst TmpInst; in emitR() local 178 TmpInst.setOpcode(Opcode); in emitR() 179 TmpInst.addOperand(MCOperand::createReg(Reg0)); in emitR() 180 TmpInst.setLoc(IDLoc); in emitR() 181 getStreamer().emitInstruction(TmpInst, *STI); in emitR() 186 MCInst TmpInst; in emitRX() local 187 TmpInst.setOpcode(Opcode); in emitRX() 188 TmpInst.addOperand(MCOperand::createReg(Reg0)); in emitRX() 189 TmpInst.addOperand(Op1); in emitRX() 190 TmpInst.setLoc(IDLoc); in emitRX() [all …]
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H A D | MipsMCCodeEmitter.cpp | 141 MCInst TmpInst = MI; in emitInstruction() 148 LowerLargeShift(TmpInst); 159 LowerCompactBranch(TmpInst); in encodeInstruction() local 163 uint32_t Binary = getBinaryCodeForInstr(TmpInst, Fixups, STI); in encodeInstruction() 168 const unsigned Opcode = TmpInst.getOpcode(); in encodeInstruction() 191 TmpInst.setOpcode (NewOpcode); in encodeInstruction() 192 Binary = getBinaryCodeForInstr(TmpInst, Fixups, STI); in encodeInstruction() 202 const MCInstrDesc &Desc = MCII.get(TmpInst.getOpcode()); in encodeInstruction()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/AsmParser/ |
H A D | HexagonAsmParser.cpp | 1290 MCInst TmpInst; in makeCombineInst() local 1291 TmpInst.setOpcode(opCode); in makeCombineInst() 1292 TmpInst.addOperand(Rdd); in makeCombineInst() 1293 TmpInst.addOperand(MO1); in makeCombineInst() 1294 TmpInst.addOperand(MO2); in makeCombineInst() 1296 return TmpInst; in makeCombineInst() 1443 MCInst TmpInst; in processInstruction() local 1446 TmpInst.setOpcode(Hexagon::C2_cmpeq); in processInstruction() 1447 TmpInst.addOperand(Pd); in processInstruction() 1448 TmpInst.addOperand(Rt); in processInstruction() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
H A D | LanaiAsmPrinter.cpp | 175 MCInst TmpInst; in emitCallInstruction() local 176 MCInstLowering.Lower(MI, TmpInst); in emitCallInstruction() 177 TmpInst.setOpcode(Lanai::BT); in emitCallInstruction() 178 OutStreamer->emitInstruction(TmpInst, STI); in emitCallInstruction() 192 MCInst TmpInst; in customEmitInstruction() local 193 MCInstLowering.Lower(MI, TmpInst); in customEmitInstruction() 194 OutStreamer->emitInstruction(TmpInst, STI); in customEmitInstruction()
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/ |
H A D | RISCVMCCodeEmitter.cpp | 123 MCInst TmpInst; in expandFunctionCall() local 150 TmpInst = MCInstBuilder(RISCV::AUIPC).addReg(Ra).addExpr(CallExpr); in expandFunctionCall() 151 Binary = getBinaryCodeForInstr(TmpInst, Fixups, STI); in expandFunctionCall() 157 TmpInst = MCInstBuilder(RISCV::JALR).addReg(RISCV::X0).addReg(Ra).addImm(0); in expandFunctionCall() 160 TmpInst = MCInstBuilder(RISCV::JALR).addReg(Ra).addReg(Ra).addImm(0); in expandFunctionCall() 161 Binary = getBinaryCodeForInstr(TmpInst, Fixups, STI); in expandFunctionCall() 216 MCInst TmpInst = MCInstBuilder(RISCV::ADD) in expandAddTPRel() local 220 uint32_t Binary = getBinaryCodeForInstr(TmpInst, Fixups, STI); in expandAddTPRel() 273 MCInst TmpInst = MCInstBuilder(InvOpc).addReg(SrcReg1).addImm(6); in expandLongCondBr() local 274 uint16_t Binary = getBinaryCodeForInstr(TmpInst, Fixups, STI); in expandLongCondBr() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCAsmPrinter.cpp | 803 MCInst TmpInst; in emitInstruction() local 983 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this); in emitInstruction() 985 unsigned PICR = TmpInst.getOperand(0).getReg(); in emitInstruction() 1008 TmpInst.setOpcode(PPC::LWZ); in emitInstruction() 1015 const MCOperand TR = TmpInst.getOperand(1); in emitInstruction() 1016 const MCOperand PICR = TmpInst.getOperand(0); in emitInstruction() 1019 TmpInst.getOperand(1) = in emitInstruction() 1021 TmpInst.getOperand(0) = TR; in emitInstruction() 1022 TmpInst.getOperand(2) = PICR; in emitInstruction() 1023 EmitToStreamer(*OutStreamer, TmpInst); in emitInstruction() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMAsmPrinter.cpp | 1585 MCInst TmpInst; in emitInstruction() local 1586 TmpInst.setOpcode(Opc == ARM::MOVi16_ga_pcrel? ARM::MOVi16 : ARM::t2MOVi16); in emitInstruction() 1587 TmpInst.addOperand(MCOperand::createReg(MI->getOperand(0).getReg())); in emitInstruction() 1604 TmpInst.addOperand(MCOperand::createExpr(PCRelExpr)); in emitInstruction() 1607 TmpInst.addOperand(MCOperand::createImm(ARMCC::AL)); in emitInstruction() 1608 TmpInst.addOperand(MCOperand::createReg(0)); in emitInstruction() 1610 TmpInst.addOperand(MCOperand::createReg(0)); in emitInstruction() 1611 EmitToStreamer(*OutStreamer, TmpInst); in emitInstruction() 1616 MCInst TmpInst; in emitInstruction() local 1617 TmpInst.setOpcode(Opc == ARM::MOVTi16_ga_pcrel in emitInstruction() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARC/ |
H A D | ARCAsmPrinter.cpp | 64 MCInst TmpInst; in emitInstruction() local 65 MCInstLowering.Lower(MI, TmpInst); in emitInstruction() 66 EmitToStreamer(*OutStreamer, TmpInst); in emitInstruction()
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/freebsd/contrib/llvm-project/llvm/lib/Target/BPF/ |
H A D | BPFAsmPrinter.cpp | 143 MCInst TmpInst; in emitInstruction() local 145 if (!BTF || !BTF->InstLower(MI, TmpInst)) { in emitInstruction() 147 MCInstLowering.Lower(MI, TmpInst); in emitInstruction() 149 EmitToStreamer(*OutStreamer, TmpInst); in emitInstruction()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/AsmParser/ |
H A D | XtensaAsmParser.cpp | 388 MCInst TmpInst; in processInstruction() local 389 TmpInst.setLoc(IDLoc); in processInstruction() 390 TmpInst.setOpcode(Xtensa::L32R); in processInstruction() 397 TmpInst.addOperand(Inst.getOperand(0)); in processInstruction() 399 TmpInst.addOperand(Op1); in processInstruction() 401 Inst = TmpInst; in processInstruction() 404 MCInst TmpInst; in processInstruction() local 405 TmpInst.setLoc(IDLoc); in processInstruction() 406 TmpInst.setOpcode(Xtensa::L32R); in processInstruction() 413 TmpInst.addOperand(Inst.getOperand(0)); in processInstruction() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | R600MCInstLower.cpp | 69 MCInst TmpInst; in emitInstruction() local 70 MCInstLowering.lower(MI, TmpInst); in emitInstruction() 71 EmitToStreamer(*OutStreamer, TmpInst); in emitInstruction()
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H A D | AMDGPUMCInstLower.cpp | 271 MCInst TmpInst; in emitInstruction() local 272 MCInstLowering.lower(MI, TmpInst); in emitInstruction() 273 EmitToStreamer(*OutStreamer, TmpInst); in emitInstruction() 291 InstEmitter->encodeInstruction(TmpInst, CodeBytes, Fixups, STI); in emitInstruction() 305 InstPrinter.printInst(&TmpInst, 0, StringRef(), STI, DisasmStream); in emitInstruction() 312 TmpInst, CodeBytes, Fixups, MF->getSubtarget<MCSubtargetInfo>()); in emitInstruction()
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/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
H A D | LoongArchAsmPrinter.cpp | 52 MCInst TmpInst; in emitInstruction() local 53 if (!lowerLoongArchMachineInstrToMCInst(MI, TmpInst, *this)) in emitInstruction() 54 EmitToStreamer(*OutStreamer, TmpInst); in emitInstruction()
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/freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/ |
H A D | MSP430AsmPrinter.cpp | 157 MCInst TmpInst; in emitInstruction() local 158 MCInstLowering.Lower(MI, TmpInst); in emitInstruction() 159 EmitToStreamer(*OutStreamer, TmpInst); in emitInstruction()
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/freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/ |
H A D | SPIRVAsmPrinter.cpp | 242 MCInst TmpInst; in outputInstruction() local 243 MCInstLowering.lower(MI, TmpInst, MAI); in outputInstruction() 244 outputMCInst(TmpInst); in outputInstruction() 334 MCInst TmpInst; in outputEntryPoints() local 335 MCInstLowering.lower(MI, TmpInst, MAI); in outputEntryPoints() 338 TmpInst.addOperand(MCOperand::createReg(Reg)); in outputEntryPoints() 340 outputMCInst(TmpInst); in outputEntryPoints()
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/freebsd/contrib/llvm-project/llvm/lib/Target/XCore/ |
H A D | XCoreAsmPrinter.cpp | 290 MCInst TmpInst; in emitInstruction() local 291 MCInstLowering.Lower(MI, TmpInst); in emitInstruction() 293 EmitToStreamer(*OutStreamer, TmpInst); in emitInstruction()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/AsmParser/ |
H A D | SparcAsmParser.cpp | 683 MCInst TmpInst; in expandSET() local 685 TmpInst.setLoc(IDLoc); in expandSET() 686 TmpInst.setOpcode(SP::SETHIi); in expandSET() 687 TmpInst.addOperand(MCRegOp); in expandSET() 688 TmpInst.addOperand(MCOperand::createExpr(Expr)); in expandSET() 689 Instructions.push_back(TmpInst); in expandSET() 704 MCInst TmpInst; in expandSET() local 710 TmpInst.setLoc(IDLoc); in expandSET() 711 TmpInst.setOpcode(SP::ORri); in expandSET() 712 TmpInst.addOperand(MCRegOp); in expandSET() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/MCTargetDesc/ |
H A D | LoongArchMCCodeEmitter.cpp | 369 MCInst TmpInst = MCInstBuilder(Opc).addOperand(MI.getOperand(0)).addImm(Imm); in expandToVectorLDI() local 370 uint32_t Binary = getBinaryCodeForInstr(TmpInst, Fixups, STI); in expandToVectorLDI() 400 MCInst TmpInst = in expandAddTPRel() local 402 uint32_t Binary = getBinaryCodeForInstr(TmpInst, Fixups, STI); in expandAddTPRel()
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/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/ |
H A D | CSKYAsmPrinter.cpp | 162 MCInst TmpInst; in emitInstruction() local 163 MCInstLowering.Lower(MI, TmpInst); in emitInstruction() 164 EmitToStreamer(*OutStreamer, TmpInst); in emitInstruction()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/ |
H A D | AMDGPUDisassembler.h | 136 MCInst TmpInst; in tryDecodeInst() local 145 decodeInstruction(Table, TmpInst, Inst, Address, this, STI); in tryDecodeInst() 150 MI = TmpInst; in tryDecodeInst()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64AsmPrinter.cpp | 2410 MCInst TmpInst; in emitInstruction() local 2411 TmpInst.setOpcode(AArch64::MOVIv16b_ns); in emitInstruction() 2412 TmpInst.addOperand(MCOperand::createReg(MI->getOperand(0).getReg())); in emitInstruction() 2413 TmpInst.addOperand(MCOperand::createImm(MI->getOperand(1).getImm())); in emitInstruction() 2414 EmitToStreamer(*OutStreamer, TmpInst); in emitInstruction() 2516 MCInst TmpInst; in emitInstruction() local 2517 TmpInst.setOpcode(Opcodes[Key][IsZero]); in emitInstruction() 2518 TmpInst.addOperand(MCOperand::createReg(MI->getOperand(0).getReg())); in emitInstruction() 2520 TmpInst.addOperand(MCOperand::createReg(DiscReg)); in emitInstruction() 2521 EmitToStreamer(*OutStreamer, TmpInst); in emitInstruction() [all …]
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