| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | IntrinsicLowering.cpp | 95 Value *Tmp6 = Builder.CreateShl(V, ConstantInt::get(V->getType(), 24), in LowerBSWAP() local
114 Tmp6 = Builder.CreateAnd(Tmp6, in LowerBSWAP()
135 Tmp6 = Builder.CreateOr(Tmp6, Tmp5, "bswap.or2"); in LowerBSWAP()
138 Tmp8 = Builder.CreateOr(Tmp8, Tmp6, "bswap.or5"); in LowerBSWAP()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
| H A D | IntegerDivision.cpp | 290 Value *Tmp6 = Builder.CreateLShr(Q_2, MSB); in generateUnsignedDivisionCode() local
291 Value *Tmp7 = Builder.CreateOr(Tmp5, Tmp6); in generateUnsignedDivisionCode()
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| /freebsd/contrib/llvm-project/clang/lib/CodeGen/ |
| H A D | CGExprComplex.cpp | 1097 llvm::Value *Tmp6 = Builder.CreateAdd(Tmp4, Tmp5); // cc+dd in EmitBinDiv() local
1104 DSTr = Builder.CreateUDiv(Tmp3, Tmp6); in EmitBinDiv()
1105 DSTi = Builder.CreateUDiv(Tmp9, Tmp6); in EmitBinDiv()
1107 DSTr = Builder.CreateSDiv(Tmp3, Tmp6); in EmitBinDiv()
1108 DSTi = Builder.CreateSDiv(Tmp9, Tmp6); in EmitBinDiv()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 9370 SDValue Tmp1, Tmp2, Tmp3, Tmp4, Tmp5, Tmp6, Tmp7, Tmp8; in expandBSWAP() local
9393 Tmp6 = DAG.getNode(ISD::AND, dl, VT, Op, in expandBSWAP()
9395 Tmp6 = DAG.getNode(ISD::SHL, dl, VT, Tmp6, DAG.getConstant(24, dl, SHVT)); in expandBSWAP()
9410 Tmp6 = DAG.getNode(ISD::OR, dl, VT, Tmp6, Tmp5); in expandBSWAP()
9413 Tmp8 = DAG.getNode(ISD::OR, dl, VT, Tmp8, Tmp6); in expandBSWAP()
9430 SDValue Tmp1, Tmp2, Tmp3, Tmp4, Tmp5, Tmp6, Tmp7, Tmp8; in expandVPBSWAP() local
9463 Tmp6 = DAG.getNode(ISD::VP_AND, dl, VT, Op, in expandVPBSWAP()
9465 Tmp6 = DAG.getNode(ISD::VP_SHL, dl, VT, Tmp6, DAG.getConstant(24, dl, SHVT), in expandVPBSWAP()
9486 Tmp6 = DAG.getNode(ISD::VP_OR, dl, VT, Tmp6, Tmp5, Mask, EVL); in expandVPBSWAP()
9489 Tmp8 = DAG.getNode(ISD::VP_OR, dl, VT, Tmp8, Tmp6, Mask, EVL); in expandVPBSWAP()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 9122 SDValue Tmp6 = DAG.getNode(PPCISD::SHL, dl, VT, Lo, Tmp5); in LowerSHL_PARTS() local
9123 SDValue OutHi = DAG.getNode(ISD::OR, dl, VT, Tmp4, Tmp6); in LowerSHL_PARTS()
9151 SDValue Tmp6 = DAG.getNode(PPCISD::SRL, dl, VT, Hi, Tmp5); in LowerSRL_PARTS() local
9152 SDValue OutLo = DAG.getNode(ISD::OR, dl, VT, Tmp4, Tmp6); in LowerSRL_PARTS()
9179 SDValue Tmp6 = DAG.getNode(PPCISD::SRA, dl, VT, Hi, Tmp5); in LowerSRA_PARTS() local
9182 Tmp4, Tmp6, ISD::SETLE); in LowerSRA_PARTS()
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