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Searched refs:Tmp0 (Results 1 – 13 of 13) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelDAGToDAG.cpp4256 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in matchBEXTRFromAndImm() local
4257 if (tryFoldLoad(Node, N0.getNode(), Input, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4)) { in matchBEXTRFromAndImm()
4259 Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, Control, Input.getOperand(0)}; in matchBEXTRFromAndImm()
4293 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in emitPCMPISTR() local
4294 if (MayFoldLoad && tryFoldLoad(Node, N1, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4)) { in emitPCMPISTR()
4295 SDValue Ops[] = { N0, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, Imm, in emitPCMPISTR()
4326 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in emitPCMPESTR() local
4327 if (MayFoldLoad && tryFoldLoad(Node, N2, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4)) { in emitPCMPESTR()
4328 SDValue Ops[] = { N0, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, Imm, in emitPCMPESTR()
4619 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in matchVPTERNLOG() local
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H A DX86ISelLowering.cpp39090 unsigned Tmp0 = SrcBits, Tmp1 = SrcBits; in ComputeNumSignBitsForTargetNode() local
39092 Tmp0 = NumSignBitsPACKSS(Op.getOperand(0), DemandedLHS); in ComputeNumSignBitsForTargetNode()
39095 unsigned Tmp = std::min(Tmp0, Tmp1); in ComputeNumSignBitsForTargetNode()
39145 unsigned Tmp0 = in ComputeNumSignBitsForTargetNode() local
39147 if (Tmp0 == 1) return 1; // Early out. in ComputeNumSignBitsForTargetNode()
39150 return std::min(Tmp0, Tmp1); in ComputeNumSignBitsForTargetNode()
39154 unsigned Tmp0 = DAG.ComputeNumSignBits(Op.getOperand(0), Depth+1); in ComputeNumSignBitsForTargetNode() local
39155 if (Tmp0 == 1) return 1; // Early out. in ComputeNumSignBitsForTargetNode()
39157 return std::min(Tmp0, Tmp1); in ComputeNumSignBitsForTargetNode()
39194 unsigned Tmp0 = VTBits; in ComputeNumSignBitsForTargetNode() local
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/Utils/
H A DIntegerDivision.cpp234 Value *Tmp0 = Builder.CreateCall(CTLZ, {Divisor, True}); in generateUnsignedDivisionCode() local
236 Value *SR = Builder.CreateSub(Tmp0, Tmp1); in generateUnsignedDivisionCode()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUPromoteAlloca.cpp1559 Value *Tmp0 = Builder.CreateMul(TCntY, TCntZ, "", true, true); in tryPromoteAllocaToLDS() local
1560 Tmp0 = Builder.CreateMul(Tmp0, TIdX); in tryPromoteAllocaToLDS()
1562 Value *TID = Builder.CreateAdd(Tmp0, Tmp1); in tryPromoteAllocaToLDS()
H A DAMDGPUISelLowering.cpp2491 SDValue Tmp0 = DAG.getNode(ISD::AND, SL, MVT::i64, BcInt, Not); in LowerFTRUNC() local
2501 SDValue Tmp1 = DAG.getNode(ISD::SELECT, SL, MVT::i64, ExpLt0, SignBit64, Tmp0); in LowerFTRUNC()
6067 unsigned Tmp0 = DAG.ComputeNumSignBits(Op.getOperand(0), Depth + 1); in ComputeNumSignBitsForTargetNode() local
6068 if (Tmp0 == 1) in ComputeNumSignBitsForTargetNode()
6071 return std::min({Tmp0, Tmp1, Tmp2}); in ComputeNumSignBitsForTargetNode()
6104 unsigned Tmp0 = Analysis.computeNumSignBits(Src0, DemandedElts, Depth + 1); in computeNumSignBitsForTargetInstr() local
6105 if (Tmp0 == 1) in computeNumSignBitsForTargetInstr()
6107 return std::min({Tmp0, Tmp1, Tmp2}); in computeNumSignBitsForTargetInstr()
H A DAMDGPULegalizerInfo.cpp2593 auto Tmp0 = B.buildAnd(S64, Src, Not); in legalizeIntrinsicTrunc() local
2599 auto Tmp1 = B.buildSelect(S64, ExpLt0, SignBit64, Tmp0); in legalizeIntrinsicTrunc()
4919 auto Tmp0 = B.buildFMA(ResTy, NegY, R, One); in legalizeFastUnsafeFDIV64() local
4920 R = B.buildFMA(ResTy, Tmp0, R, R); in legalizeFastUnsafeFDIV64()
H A DSIISelLowering.cpp11171 SDValue Tmp0 = DAG.getNode(ISD::FMA, SL, VT, NegY, R, One); in lowerFastUnsafeFDIV64() local
11173 R = DAG.getNode(ISD::FMA, SL, VT, Tmp0, R, R); in lowerFastUnsafeFDIV64()
/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp550 unsigned Tmp0, Tmp1, CmpReg, EqzReg, FalseReg, TrueReg; in LowerFPToInt() local
551 Tmp0 = MRI.createVirtualRegister(MRI.getRegClass(InReg)); in LowerFPToInt()
562 Tmp0 = InReg; in LowerFPToInt()
564 BuildMI(BB, DL, TII.get(Abs), Tmp0).addReg(InReg); in LowerFPToInt()
568 BuildMI(BB, DL, TII.get(LT), CmpReg).addReg(Tmp0).addReg(Tmp1); in LowerFPToInt()
578 BuildMI(BB, DL, TII.get(GE), SecondCmpReg).addReg(Tmp0).addReg(Tmp1); in LowerFPToInt()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp6112 SDValue Tmp0 = Op.getOperand(0); in LowerFCOPYSIGN() local
6117 bool InGPR = Tmp0.getOpcode() == ISD::BITCAST || in LowerFCOPYSIGN()
6118 Tmp0.getOpcode() == ARMISD::VMOVDRR; in LowerFCOPYSIGN()
6132 Tmp0 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2f32, Tmp0); in LowerFCOPYSIGN()
6143 Tmp0 = DAG.getNode(ISD::BITCAST, dl, OpVT, Tmp0); in LowerFCOPYSIGN()
6154 DAG.getNode(ISD::AND, dl, OpVT, Tmp0, MaskNot)); in LowerFCOPYSIGN()
6177 Tmp0 = DAG.getNode(ISD::AND, dl, MVT::i32, in LowerFCOPYSIGN()
6178 DAG.getNode(ISD::BITCAST, dl, MVT::i32, Tmp0), Mask2); in LowerFCOPYSIGN()
6180 DAG.getNode(ISD::OR, dl, MVT::i32, Tmp0, Tmp1)); in LowerFCOPYSIGN()
6184 Tmp0 = DAG.getNode(ARMISD::VMOVRRD, dl, DAG.getVTList(MVT::i32, MVT::i32), in LowerFCOPYSIGN()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLoweringHVX.cpp2498 auto [Tmp0, Ovf] = emitHvxAddWithOverflow(Inp, LowBits, dl, Signed, DAG); in emitHvxShiftRightRnd()
2502 SDValue Tmp2 = DAG.getNode(ShRight, dl, IntTy, Tmp0, AmtM1); in emitHvxShiftRightRnd()
/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp2486 SDValue Tmp0 = DAG.getFPExtendOrRound(N->getOperand(0), DL, NVT); in PromoteBinOpToF32() local
2488 SDValue Res = DAG.getNode(N->getOpcode(), DL, NVT, Tmp0, Tmp1, N->getFlags()); in PromoteBinOpToF32()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGBuilder.cpp9334 SDValue Tmp0 = getValue(I.getArgOperand(0)); in visitBinaryFloatCall() local
9336 EVT VT = Tmp0.getValueType(); in visitBinaryFloatCall()
9337 setValue(&I, DAG.getNode(Opcode, getCurSDLoc(), VT, Tmp0, Tmp1, Flags)); in visitBinaryFloatCall()
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp9289 unsigned Tmp0, Tmp1; // not used in computeKnownBitsForTargetNode() local
9290 if (Op.getResNo() == 1 && isIntrinsicWithCC(Op, Tmp0, Tmp1)) { in computeKnownBitsForTargetNode()