| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | EarlyIfConversion.cpp | 116 Register TReg, FReg; member
528 PI.TReg = PI.PHI->getOperand(i).getReg(); in canConvertIf()
532 assert(PI.TReg.isVirtual() && "Bad PHI"); in canConvertIf()
537 PI.TReg, PI.FReg, PI.CondCycles, PI.TCycles, in canConvertIf()
573 const TargetInstrInfo *TII, Register TReg, in hasSameValue() argument
575 if (TReg == FReg) in hasSameValue()
578 if (!TReg.isVirtual() || !FReg.isVirtual()) in hasSameValue()
581 const MachineInstr *TDef = MRI.getUniqueVRegDef(TReg); in hasSameValue()
609 int TIdx = TDef->findRegisterDefOperandIdx(TReg, /*TRI=*/nullptr); in hasSameValue()
630 if (hasSameValue(*MRI, TII, PI.TReg, PI.FReg)) { in replacePHIInstrs()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ExpandPseudo.cpp | 654 Register TReg = MBBI->getOperand(0).getReg(); in expandMI() local
656 Register TReg0 = TRI->getSubReg(TReg, X86::sub_t0); in expandMI()
657 Register TReg1 = TRI->getSubReg(TReg, X86::sub_t1); in expandMI()
701 Register TReg = MBBI->getOperand(X86::AddrNumOperands).getReg(); in expandMI() local
703 Register TReg0 = TRI->getSubReg(TReg, X86::sub_t0); in expandMI()
704 Register TReg1 = TRI->getSubReg(TReg, X86::sub_t1); in expandMI()
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| H A D | X86ISelDAGToDAG.cpp | 5349 SDValue TReg = getI8Imm(TIndex, dl); in Select() local
5358 SDValue Ops[] = { Base, Scale, Index, Disp, Segment, TReg, Chain }; in Select()
5361 SDValue Ops[] = { TReg, Base, Scale, Index, Disp, Segment, Chain }; in Select()
5414 SDValue TReg = getI8Imm(TIndex, dl); in Select() local
5421 SDValue Ops[] = {TReg, Base, Scale, Index, Disp, Segment, Chain}; in Select()
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| H A D | X86ISelLowering.cpp | 37623 Register TReg = MRI->createVirtualRegister(&X86::GR64RegClass); in EmitSjLjDispatchBlock() local
37636 BuildMI(DispContBB, MIMD, TII->get(X86::ADD64rr), TReg) in EmitSjLjDispatchBlock()
37640 BuildMI(DispContBB, MIMD, TII->get(X86::JMP64r)).addReg(TReg); in EmitSjLjDispatchBlock()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Frontend/HLSL/ |
| H A D | HLSLRootSignature.h | 31 enum class RegisterType { BReg, TReg, UReg, SReg }; enumerator
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| /freebsd/contrib/llvm-project/llvm/lib/Frontend/HLSL/ |
| H A D | HLSLRootSignature.cpp | 67 {"t", RegisterType::TReg},
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| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 2550 Register TReg = MRI.createVirtualRegister(RC); in emitSjLjDispatchBlock() local
2556 BuildMI(DispContBB, DL, TII->get(VE::LDrri), TReg) in emitSjLjDispatchBlock()
2561 .addReg(TReg, getKillRegState(true)) in emitSjLjDispatchBlock()
2576 Register TReg = MRI.createVirtualRegister(RC); in emitSjLjDispatchBlock() local
2589 BuildMI(DispContBB, DL, TII->get(VE::ADDSLrr), TReg) in emitSjLjDispatchBlock()
2593 .addReg(TReg, getKillRegState(true)) in emitSjLjDispatchBlock()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMAsmPrinter.cpp | 1548 Register TReg = MI->getOperand(0).getReg(); in emitInstruction() local
1551 if (TIP.first == TReg) { in emitInstruction()
1559 ThumbIndirectPads.push_back(std::make_pair(TReg, TRegSym)); in emitInstruction()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 4875 MCRegister TReg = Inst.getOperand(2).getReg(); in expandRotation() local
4889 TOut.emitRRR(Mips::SUBu, TmpReg, Mips::ZERO, TReg, Inst.getLoc(), STI); in expandRotation()
4895 TOut.emitRRR(Mips::ROTRV, DReg, SReg, TReg, Inst.getLoc(), STI); in expandRotation()
4920 TOut.emitRRR(Mips::SUBu, ATReg, Mips::ZERO, TReg, Inst.getLoc(), STI); in expandRotation()
4922 TOut.emitRRR(SecondShift, DReg, SReg, TReg, Inst.getLoc(), STI); in expandRotation()
5000 MCRegister TReg = Inst.getOperand(2).getReg(); in expandDRotation() local
5014 TOut.emitRRR(Mips::DSUBu, TmpReg, Mips::ZERO, TReg, Inst.getLoc(), STI); in expandDRotation()
5020 TOut.emitRRR(Mips::DROTRV, DReg, SReg, TReg, Inst.getLoc(), STI); in expandDRotation()
5045 TOut.emitRRR(Mips::DSUBu, ATReg, Mips::ZERO, TReg, Inst.getLoc(), STI); in expandDRotation()
5047 TOut.emitRRR(SecondShift, DReg, SReg, TReg, Inst.getLoc(), STI); in expandDRotation()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrInfo.cpp | 654 Register TReg = MRI.createVirtualRegister(&SystemZ::GR32BitRegClass); in insertSelect() local
656 BuildMI(MBB, I, DL, get(TargetOpcode::COPY), TReg).addReg(TrueReg); in insertSelect()
658 TrueReg = TReg; in insertSelect()
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| /freebsd/contrib/llvm-project/clang/lib/Parse/ |
| H A D | ParseHLSLRootSignature.cpp | 958 Reg.ViewType = RegisterType::TReg; in parseRegister()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 3550 const Register TReg = Sel.getTrueReg(); in select() local
3562 if (!emitSelect(Sel.getReg(0), TReg, FReg, AArch64CC::NE, MIB)) in select()
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