| /freebsd/tests/sys/cddl/zfs/tests/userquota/ |
| H A D | userquota_001_pos.ksh | 69 log_must user_run $QUSER1 $TRUNCATE -s UQUOTA_SIZE $QFILE 71 log_mustnot user_run $QUSER1 $TRUNCATE -s 1 $OFILE 77 log_must user_run $QUSER1 $TRUNCATE -s $GQUOTA_SIZE $QFILE 79 log_mustnot user_run $TRUNCATE -s 1 $OFILE
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| H A D | userquota_004_pos.ksh | 73 log_must user_run $QUSER1 $TRUNCATE -s 100m $QFILE
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| H A D | groupspace_002_pos.ksh | 69 log_must user_run $QUSER1 $TRUNCATE -s 100m $QFILE
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| /freebsd/tests/sys/cddl/zfs/tests/cli_root/zpool_import/ |
| H A D | zpool_import_missing_005_pos.ksh | 94 log_must $TRUNCATE -s 64m $REGULAR 95 log_must $TRUNCATE -s 64m $LOG 96 log_must $TRUNCATE -s 64m $CACHE 97 log_must $TRUNCATE -s 64m $SPARE
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86TargetTransformInfo.cpp | 2342 { ISD::TRUNCATE, MVT::v2i1, MVT::v2i8, { 2, 1, 1, 1 } }, in getCastInstrCost() 2343 { ISD::TRUNCATE, MVT::v2i1, MVT::v16i8, { 2, 1, 1, 1 } }, in getCastInstrCost() 2344 { ISD::TRUNCATE, MVT::v2i1, MVT::v2i16, { 2, 1, 1, 1 } }, in getCastInstrCost() 2345 { ISD::TRUNCATE, MVT::v2i1, MVT::v8i16, { 2, 1, 1, 1 } }, in getCastInstrCost() 2346 { ISD::TRUNCATE, MVT::v4i1, MVT::v4i8, { 2, 1, 1, 1 } }, in getCastInstrCost() 2347 { ISD::TRUNCATE, MVT::v4i1, MVT::v16i8, { 2, 1, 1, 1 } }, in getCastInstrCost() 2348 { ISD::TRUNCATE, MVT::v4i1, MVT::v4i16, { 2, 1, 1, 1 } }, in getCastInstrCost() 2349 { ISD::TRUNCATE, MVT::v4i1, MVT::v8i16, { 2, 1, 1, 1 } }, in getCastInstrCost() 2350 { ISD::TRUNCATE, MVT::v8i1, MVT::v8i8, { 2, 1, 1, 1 } }, in getCastInstrCost() 2351 { ISD::TRUNCATE, MVT::v8i1, MVT::v16i8, { 2, 1, 1, 1 } }, in getCastInstrCost() [all …]
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| H A D | X86ISelLowering.cpp | 1023 setOperationAction(ISD::TRUNCATE, VT, Expand); in X86TargetLowering() 1289 setOperationAction(ISD::TRUNCATE, MVT::v2i8, Custom); in X86TargetLowering() 1290 setOperationAction(ISD::TRUNCATE, MVT::v2i16, Custom); in X86TargetLowering() 1291 setOperationAction(ISD::TRUNCATE, MVT::v2i32, Custom); in X86TargetLowering() 1292 setOperationAction(ISD::TRUNCATE, MVT::v2i64, Custom); in X86TargetLowering() 1293 setOperationAction(ISD::TRUNCATE, MVT::v4i8, Custom); in X86TargetLowering() 1294 setOperationAction(ISD::TRUNCATE, MVT::v4i16, Custom); in X86TargetLowering() 1295 setOperationAction(ISD::TRUNCATE, MVT::v4i32, Custom); in X86TargetLowering() 1296 setOperationAction(ISD::TRUNCATE, MVT::v4i64, Custom); in X86TargetLowering() 1297 setOperationAction(ISD::TRUNCATE, MVT::v8i8, Custom); in X86TargetLowering() [all …]
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| /freebsd/tests/sys/cddl/zfs/tests/rsend/ |
| H A D | rsend_009_pos.ksh | 70 log_must $TRUNCATE -s 100M $TESTDIR/bfile 71 log_must $TRUNCATE -s 64M $TESTDIR/sfile 80 log_must $TRUNCATE -s 30M $mntpnt/file
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| /freebsd/tests/sys/cddl/zfs/tests/cli_root/zpool_replace/ |
| H A D | zpool_replace_002_neg.ksh | 32 log_must $TRUNCATE -s 1024m bigfile 33 log_must $TRUNCATE -s 512m smallfile
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| /freebsd/tests/sys/cddl/zfs/tests/slog/ |
| H A D | slog_012_neg.ksh | 73 log_must $TRUNCATE -s0 $ldev 74 log_must $TRUNCATE -s $st_size $ldev
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64TargetTransformInfo.cpp | 3115 {ISD::TRUNCATE, MVT::v2i8, MVT::v2i64, 1}, // xtn in getCastInstrCost() 3116 {ISD::TRUNCATE, MVT::v2i16, MVT::v2i64, 1}, // xtn in getCastInstrCost() 3117 {ISD::TRUNCATE, MVT::v2i32, MVT::v2i64, 1}, // xtn in getCastInstrCost() 3118 {ISD::TRUNCATE, MVT::v4i8, MVT::v4i32, 1}, // xtn in getCastInstrCost() 3119 {ISD::TRUNCATE, MVT::v4i8, MVT::v4i64, 3}, // 2 xtn + 1 uzp1 in getCastInstrCost() 3120 {ISD::TRUNCATE, MVT::v4i16, MVT::v4i32, 1}, // xtn in getCastInstrCost() 3121 {ISD::TRUNCATE, MVT::v4i16, MVT::v4i64, 2}, // 1 uzp1 + 1 xtn in getCastInstrCost() 3122 {ISD::TRUNCATE, MVT::v4i32, MVT::v4i64, 1}, // 1 uzp1 in getCastInstrCost() 3123 {ISD::TRUNCATE, MVT::v8i8, MVT::v8i16, 1}, // 1 xtn in getCastInstrCost() 3124 {ISD::TRUNCATE, MVT::v8i8, MVT::v8i32, 2}, // 1 uzp1 + 1 xtn in getCastInstrCost() [all …]
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| H A D | AArch64ISelLowering.cpp | 1146 setTargetDAGCombine(ISD::TRUNCATE); in AArch64TargetLowering() 1613 setOperationAction(ISD::TRUNCATE, VT, Custom); in AArch64TargetLowering() 1829 setOperationAction(ISD::TRUNCATE, VT, Custom); in AArch64TargetLowering() 1834 setOperationAction(ISD::TRUNCATE, VT, Custom); in AArch64TargetLowering() 2338 setOperationAction(ISD::TRUNCATE, VT, Default); in addTypeForFixedLengthSVE() 4026 Value = DAG.getNode(ISD::TRUNCATE, DL, MVT::i32, Mul); in getAArch64XALUOOp() 4473 Narrow = DAG.getNode(ISD::TRUNCATE, DL, I16, Narrow); in LowerFP_ROUND() 4553 SDValue Trunc = DAG.getNode(ISD::TRUNCATE, DL, VT, Cv); in LowerVectorFP_TO_INT() 4559 return DAG.getNode(ISD::TRUNCATE, DL, VT, Cv); in LowerVectorFP_TO_INT() 4728 return DAG.getNode(ISD::TRUNCATE, DL, DstVT, Sat); in LowerVectorFP_TO_INT_SAT() [all …]
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| /freebsd/tests/sys/cddl/zfs/tests/cli_root/zfs_rename/ |
| H A D | zfs_rename_005_neg.ksh | 80 log_must $TRUNCATE -s $FILESIZE $TESTDIR/$TESTFILE1
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| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 312 if (Op == ISD::TRUNCATE) { in MatchingStackOffset() 496 return VA.isExtInLoc() ? DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), Val) in LowerMemArgument() 906 Val = DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), Val); in LowerCallResult() 972 ArgValue = DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), ArgValue); in LowerFormalArguments() 1571 TruncOp = ISD::TRUNCATE; in lowerOverflowArithmetic() 1681 if (Op0.getOpcode() == ISD::TRUNCATE) in LowerAndToBTST() 1683 if (Op1.getOpcode() == ISD::TRUNCATE) in LowerAndToBTST() 1839 assert(Op.getOpcode() == ISD::TRUNCATE && Op.getValueType() == MVT::i1 && in LowerTruncateToBTST() 1856 if (User->getOpcode() == ISD::TRUNCATE && User->hasOneUse()) { in hasNonFlagsUse() 1926 if (Op->getOpcode() == ISD::TRUNCATE && Op->hasOneUse()) { in EmitTest() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMTargetTransformInfo.cpp | 598 {ISD::TRUNCATE, MVT::v4i32, MVT::v4i16, 0}, in getCastInstrCost() 599 {ISD::TRUNCATE, MVT::v4i32, MVT::v4i8, 0}, in getCastInstrCost() 600 {ISD::TRUNCATE, MVT::v8i16, MVT::v8i8, 0}, in getCastInstrCost() 601 {ISD::TRUNCATE, MVT::v8i32, MVT::v8i16, 1}, in getCastInstrCost() 602 {ISD::TRUNCATE, MVT::v8i32, MVT::v8i8, 1}, in getCastInstrCost() 603 {ISD::TRUNCATE, MVT::v16i32, MVT::v16i8, 3}, in getCastInstrCost() 604 {ISD::TRUNCATE, MVT::v16i16, MVT::v16i8, 1}, in getCastInstrCost() 677 { ISD::TRUNCATE, MVT::v4i32, MVT::v4i64, 0 }, in getCastInstrCost() 678 { ISD::TRUNCATE, MVT::v4i16, MVT::v4i32, 1 }, in getCastInstrCost() 701 { ISD::TRUNCATE, MVT::v16i8, MVT::v16i32, 6 }, in getCastInstrCost() [all …]
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| H A D | ARMSelectionDAGInfo.cpp | 108 Src = DAG.getNode(ISD::TRUNCATE, dl, MVT::i32, Src); in EmitSpecializedLibcall() 314 DAG.getNode(ISD::TRUNCATE, dl, MVT::i8, Src)); in EmitTargetCodeForMemset()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 1473 SDValue Trunc = DAG.getNode(ISD::TRUNCATE, DL, VT, SDValue(ExtLoad, 0)); in ReplaceLoadWithPromotedLoad() 1588 DAG.getNode(ISD::TRUNCATE, DL, VT, DAG.getNode(Opc, DL, PVT, NN0, NN1)); in PromoteIntBinOp() 1661 DAG.getNode(ISD::TRUNCATE, DL, VT, DAG.getNode(Opc, DL, PVT, N0, N1)); in PromoteIntShiftOp() 1733 SDValue Result = DAG.getNode(ISD::TRUNCATE, DL, VT, NewLD); in PromoteLoad() 1975 case ISD::TRUNCATE: return visitTRUNCATE(N); in visit() 2386 if (N->getOpcode() == ISD::TRUNCATE) { in isTruncateOf() 3225 if (V.getOpcode() == ISD::TRUNCATE || V.getOpcode() == ISD::ZERO_EXTEND) { in getAsCarry() 3281 if (N10.getValueType() != VT && N10.getOpcode() == ISD::TRUNCATE) in foldAddSubMasked1() 3872 RHS = DAG.getNode(ISD::TRUNCATE, DL, DstVT, RHS); in getTruncatedUSUBSAT() 3873 LHS = DAG.getNode(ISD::TRUNCATE, DL, DstVT, LHS); in getTruncatedUSUBSAT() [all …]
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| H A D | TargetLowering.cpp | 637 DAG.getNode(ISD::TRUNCATE, dl, SmallVT, Op.getOperand(0)), in ShrinkDemandedOp() 638 DAG.getNode(ISD::TRUNCATE, dl, SmallVT, Op.getOperand(1)), Flags); in ShrinkDemandedOp() 1897 TLO.DAG.getNode(ISD::TRUNCATE, dl, SmallVT, Op.getOperand(0)), in SimplifyDemandedBits() 1924 SDValue NewOp = TLO.DAG.getNode(ISD::TRUNCATE, dl, HalfVT, Op0); in SimplifyDemandedBits() 2032 SDValue NewOp = TLO.DAG.getNode(ISD::TRUNCATE, dl, HalfVT, Op0); in SimplifyDemandedBits() 2622 case ISD::TRUNCATE: { in SimplifyDemandedBits() 2641 return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::TRUNCATE, dl, VT, NewSrc)); in SimplifyDemandedBits() 2683 TLO.DAG.getNode(ISD::TRUNCATE, dl, VT, Src.getOperand(0)); in SimplifyDemandedBits() 3838 case ISD::TRUNCATE: in SimplifyDemandedVectorElts() 4490 if (N0.getOpcode() == ISD::TRUNCATE && N0.hasOneUse() && !VT.isVector() && in simplifySetCCWithCTPOP() [all …]
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| H A D | LegalizeDAG.cpp | 645 Value = DAG.getNode(ISD::TRUNCATE, dl, StVT, Value); in LegalizeStoreOps() 651 Value = DAG.getNode(ISD::TRUNCATE, dl, in LegalizeStoreOps() 1748 SignBit = DAG.getNode(ISD::TRUNCATE, DL, MagVT, SignBit); in ExpandFCOPYSIGN() 2991 SDValue Trunc = DAG.getNode(ISD::TRUNCATE, dl, DestVT, Operation); in PromoteLegalFP_TO_INT() 3018 return DAG.getNode(ISD::TRUNCATE, dl, Node->getValueType(0), Result); in PromoteLegalFP_TO_INT_SAT() 3389 DAG.getNode(ISD::TRUNCATE, dl, MVT::i16, Op)); in ExpandNode() 3684 Tmp1 = DAG.getNode(ISD::TRUNCATE, dl, Node->getValueType(0), Tmp1); in ExpandNode() 3687 Tmp1 = DAG.getNode(ISD::TRUNCATE, dl, Node->getValueType(0), in ExpandNode() 5089 Results.push_back(DAG.getNode(ISD::TRUNCATE, dl, RVT, Tmp.first)); in ConvertNodeToLibcall() 5356 DAG.getNode(ISD::TRUNCATE, dl, OVT, Tmp1, SDNodeFlags::NoWrap)); in PromoteNode() [all …]
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| H A D | LegalizeTypes.cpp | 1028 Lo = DAG.getNode(ISD::TRUNCATE, dl, LoVT, Op); in SplitInteger() 1037 Hi = DAG.getNode(ISD::TRUNCATE, dl, HiVT, Hi); in SplitInteger()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 838 TRUNCATE, enumerator
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelLowering.cpp | 341 setOperationAction(ISD::TRUNCATE, VT, Custom); in LoongArchTargetLowering() 3845 return DAG.getNode(ISD::TRUNCATE, DL, N->getValueType(0), NewRes); in customLegalizeToWOp() 3857 return DAG.getNode(ISD::TRUNCATE, DL, MVT::i32, NewRes); in customLegalizeToWOpWithSExt() 3891 Results.push_back(DAG.getNode(ISD::TRUNCATE, DL, Node->getValueType(0), in replaceVPICKVE2GRResults() 3905 DAG.getNode(ISD::TRUNCATE, DL, N->getValueType(0), CB.getValue(0))); in replaceVecCondBranchResults() 4089 Results.push_back(DAG.getNode(ISD::TRUNCATE, DL, MVT::i32, Dst)); in ReplaceNodeResults() 4105 Results.push_back(DAG.getNode(ISD::TRUNCATE, DL, MVT::i32, Tmp1)); in ReplaceNodeResults() 4127 Results.push_back(DAG.getNode(ISD::TRUNCATE, DL, VT, Tmp)); in ReplaceNodeResults() 4147 Results.push_back(DAG.getNode(ISD::TRUNCATE, DL, VT, Tmp)); in ReplaceNodeResults() 4182 DAG.getNode(ISD::TRUNCATE, DL, VT, MOVFCSR2GRResults.getValue(0))); in ReplaceNodeResults() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelDAGToDAG.cpp | 484 if (Opcode == ISD::TRUNCATE && N.getOperand(0).getValueSizeInBits() <= 64) { in expandAddress() 668 SDValue Trunc = CurDAG->getNode(ISD::TRUNCATE, DL, VT, Base); in getAddressOperands() 802 case ISD::TRUNCATE: { in expandRxSBG() 994 RISBG.Input.getOpcode() != ISD::TRUNCATE) in tryRISBGZero() 1113 RxSBG[I].Input.getOpcode() != ISD::TRUNCATE) in tryRxSBG()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 1463 return DAG.getNode(ISD::TRUNCATE, dl, ExpectedVT, V); in correctParamType() 1937 Ret = DAG.getNode(ISD::TRUNCATE, dl, ExpectedVT, Ret); in LowerCall() 2852 if (TrueVal.getOpcode() == ISD::TRUNCATE && in lowerSELECT() 2853 FalseVal.getOpcode() == ISD::TRUNCATE) { in lowerSELECT() 2863 return DAG.getNode(ISD::TRUNCATE, DL, MVT::i1, Select); in lowerSELECT() 3142 SDValue result = DAG.getNode(ISD::TRUNCATE, dl, MVT::i1, newLD); in LowerLOADi1() 5163 if (Op.getValueType() == MVT::i16 && Op.getOpcode() == ISD::TRUNCATE && in combinePackingMovIntoStore() 5473 DCI.DAG.getNode(ISD::TRUNCATE, DL, DemotedVT, LHS); in TryMULWIDECombine() 5475 DCI.DAG.getNode(ISD::TRUNCATE, DL, DemotedVT, RHS); in TryMULWIDECombine() 5665 ISD::TRUNCATE, DL, EltIVT, in PerformEXTRACTCombine() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 311 setOperationAction(ISD::TRUNCATE, MVT::i1, Custom); in PPCTargetLowering() 916 setOperationAction(ISD::TRUNCATE, MVT::v8i8, Custom); in PPCTargetLowering() 917 setOperationAction(ISD::TRUNCATE, MVT::v4i8, Custom); in PPCTargetLowering() 918 setOperationAction(ISD::TRUNCATE, MVT::v2i8, Custom); in PPCTargetLowering() 919 setOperationAction(ISD::TRUNCATE, MVT::v4i16, Custom); in PPCTargetLowering() 920 setOperationAction(ISD::TRUNCATE, MVT::v2i16, Custom); in PPCTargetLowering() 1427 setTargetDAGCombine({ISD::TRUNCATE, ISD::VECTOR_SHUFFLE}); in PPCTargetLowering() 1430 setTargetDAGCombine({ISD::TRUNCATE, ISD::SETCC, ISD::SELECT_CC}); in PPCTargetLowering() 4365 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, MVT::i1, ArgValue); in LowerFormalArguments_32SVR4() 4505 return DAG.getNode(ISD::TRUNCATE, dl, ObjectVT, ArgVal); in extendArgForPPC64() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 799 setOperationAction({ISD::TRUNCATE, ISD::CONCAT_VECTORS, in RISCVTargetLowering() 905 {ISD::TRUNCATE, ISD::TRUNCATE_SSAT_S, ISD::TRUNCATE_USAT_U}, VT, in RISCVTargetLowering() 1284 {ISD::TRUNCATE, ISD::TRUNCATE_SSAT_S, ISD::TRUNCATE_USAT_U}, VT, in RISCVTargetLowering() 1639 setTargetDAGCombine(ISD::TRUNCATE); in RISCVTargetLowering() 4858 Res = DAG.getNode(ISD::TRUNCATE, DL, ResVT, Res); in getDeinterleaveShiftAndTrunc() 6440 Exp = DAG.getNode(ISD::TRUNCATE, DL, VT, Exp); in lowerCTLZ_CTTZ_ZERO_UNDEF() 6508 return DAG.getNode(ISD::TRUNCATE, DL, Op.getValueType(), Res); in lowerVPCttzElements() 6778 return DAG.getNode(ISD::TRUNCATE, DL, VT, Res); in LowerIS_FPCLASS() 7349 case ISD::TRUNCATE: in LowerOperation() 7380 return DAG.getNode(ISD::TRUNCATE, DL, VT, V); in LowerOperation() [all …]
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