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Searched refs:TRCSSCSR (Results 1 – 2 of 2) sorted by relevance

/freebsd/sys/arm64/coresight/
H A Dcoresight_etm4x.h125 #define TRCSSCSR(n) (0x2A0 + (n) * 0x4) /* Trace Single-shot Comparator Status Register [n=0-7] */ macro
H A Dcoresight_etm4x.c150 bus_write_4(sc->res, TRCSSCSR(0), 0); in etm_prepare()