1 /*-
2 * Copyright (c) 2011
3 * Ben Gray <ben.r.gray@gmail.com>.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27
28 #include <sys/param.h>
29 #include <sys/systm.h>
30 #include <sys/conf.h>
31 #include <sys/kernel.h>
32 #include <sys/rman.h>
33 #include <sys/module.h>
34
35 #include <dev/ofw/ofw_bus_subr.h>
36
37 #include <machine/bus.h>
38
39 #include <arm/ti/ti_sysc.h>
40 #include <arm/ti/usb/omap_usb.h>
41
42 /*
43 * USB TLL Module
44 */
45 #define OMAP_USBTLL_REVISION 0x0000
46 #define OMAP_USBTLL_SYSCONFIG 0x0010
47 #define OMAP_USBTLL_SYSSTATUS 0x0014
48 #define OMAP_USBTLL_IRQSTATUS 0x0018
49 #define OMAP_USBTLL_IRQENABLE 0x001C
50 #define OMAP_USBTLL_TLL_SHARED_CONF 0x0030
51 #define OMAP_USBTLL_TLL_CHANNEL_CONF(i) (0x0040 + (0x04 * (i)))
52 #define OMAP_USBTLL_SAR_CNTX(i) (0x0400 + (0x04 * (i)))
53 #define OMAP_USBTLL_ULPI_VENDOR_ID_LO(i) (0x0800 + (0x100 * (i)))
54 #define OMAP_USBTLL_ULPI_VENDOR_ID_HI(i) (0x0801 + (0x100 * (i)))
55 #define OMAP_USBTLL_ULPI_PRODUCT_ID_LO(i) (0x0802 + (0x100 * (i)))
56 #define OMAP_USBTLL_ULPI_PRODUCT_ID_HI(i) (0x0803 + (0x100 * (i)))
57 #define OMAP_USBTLL_ULPI_FUNCTION_CTRL(i) (0x0804 + (0x100 * (i)))
58 #define OMAP_USBTLL_ULPI_FUNCTION_CTRL_SET(i) (0x0805 + (0x100 * (i)))
59 #define OMAP_USBTLL_ULPI_FUNCTION_CTRL_CLR(i) (0x0806 + (0x100 * (i)))
60 #define OMAP_USBTLL_ULPI_INTERFACE_CTRL(i) (0x0807 + (0x100 * (i)))
61 #define OMAP_USBTLL_ULPI_INTERFACE_CTRL_SET(i) (0x0808 + (0x100 * (i)))
62 #define OMAP_USBTLL_ULPI_INTERFACE_CTRL_CLR(i) (0x0809 + (0x100 * (i)))
63 #define OMAP_USBTLL_ULPI_OTG_CTRL(i) (0x080A + (0x100 * (i)))
64 #define OMAP_USBTLL_ULPI_OTG_CTRL_SET(i) (0x080B + (0x100 * (i)))
65 #define OMAP_USBTLL_ULPI_OTG_CTRL_CLR(i) (0x080C + (0x100 * (i)))
66 #define OMAP_USBTLL_ULPI_USB_INT_EN_RISE(i) (0x080D + (0x100 * (i)))
67 #define OMAP_USBTLL_ULPI_USB_INT_EN_RISE_SET(i) (0x080E + (0x100 * (i)))
68 #define OMAP_USBTLL_ULPI_USB_INT_EN_RISE_CLR(i) (0x080F + (0x100 * (i)))
69 #define OMAP_USBTLL_ULPI_USB_INT_EN_FALL(i) (0x0810 + (0x100 * (i)))
70 #define OMAP_USBTLL_ULPI_USB_INT_EN_FALL_SET(i) (0x0811 + (0x100 * (i)))
71 #define OMAP_USBTLL_ULPI_USB_INT_EN_FALL_CLR(i) (0x0812 + (0x100 * (i)))
72 #define OMAP_USBTLL_ULPI_USB_INT_STATUS(i) (0x0813 + (0x100 * (i)))
73 #define OMAP_USBTLL_ULPI_USB_INT_LATCH(i) (0x0814 + (0x100 * (i)))
74 #define OMAP_USBTLL_ULPI_DEBUG(i) (0x0815 + (0x100 * (i)))
75 #define OMAP_USBTLL_ULPI_SCRATCH_REGISTER(i) (0x0816 + (0x100 * (i)))
76 #define OMAP_USBTLL_ULPI_SCRATCH_REGISTER_SET(i) (0x0817 + (0x100 * (i)))
77 #define OMAP_USBTLL_ULPI_SCRATCH_REGISTER_CLR(i) (0x0818 + (0x100 * (i)))
78 #define OMAP_USBTLL_ULPI_EXTENDED_SET_ACCESS(i) (0x082F + (0x100 * (i)))
79 #define OMAP_USBTLL_ULPI_UTMI_VCONTROL_EN(i) (0x0830 + (0x100 * (i)))
80 #define OMAP_USBTLL_ULPI_UTMI_VCONTROL_EN_SET(i) (0x0831 + (0x100 * (i)))
81 #define OMAP_USBTLL_ULPI_UTMI_VCONTROL_EN_CLR(i) (0x0832 + (0x100 * (i)))
82 #define OMAP_USBTLL_ULPI_UTMI_VCONTROL_STATUS(i) (0x0833 + (0x100 * (i)))
83 #define OMAP_USBTLL_ULPI_UTMI_VCONTROL_LATCH(i) (0x0834 + (0x100 * (i)))
84 #define OMAP_USBTLL_ULPI_UTMI_VSTATUS(i) (0x0835 + (0x100 * (i)))
85 #define OMAP_USBTLL_ULPI_UTMI_VSTATUS_SET(i) (0x0836 + (0x100 * (i)))
86 #define OMAP_USBTLL_ULPI_UTMI_VSTATUS_CLR(i) (0x0837 + (0x100 * (i)))
87 #define OMAP_USBTLL_ULPI_USB_INT_LATCH_NOCLR(i) (0x0838 + (0x100 * (i)))
88 #define OMAP_USBTLL_ULPI_VENDOR_INT_EN(i) (0x083B + (0x100 * (i)))
89 #define OMAP_USBTLL_ULPI_VENDOR_INT_EN_SET(i) (0x083C + (0x100 * (i)))
90 #define OMAP_USBTLL_ULPI_VENDOR_INT_EN_CLR(i) (0x083D + (0x100 * (i)))
91 #define OMAP_USBTLL_ULPI_VENDOR_INT_STATUS(i) (0x083E + (0x100 * (i)))
92 #define OMAP_USBTLL_ULPI_VENDOR_INT_LATCH(i) (0x083F + (0x100 * (i)))
93
94 /* TLL Register Set */
95 #define TLL_SYSCONFIG_CACTIVITY (1UL << 8)
96 #define TLL_SYSCONFIG_SIDLE_SMART_IDLE (2UL << 3)
97 #define TLL_SYSCONFIG_SIDLE_NO_IDLE (1UL << 3)
98 #define TLL_SYSCONFIG_SIDLE_FORCED_IDLE (0UL << 3)
99 #define TLL_SYSCONFIG_ENAWAKEUP (1UL << 2)
100 #define TLL_SYSCONFIG_SOFTRESET (1UL << 1)
101 #define TLL_SYSCONFIG_AUTOIDLE (1UL << 0)
102
103 #define TLL_SYSSTATUS_RESETDONE (1UL << 0)
104
105 #define TLL_SHARED_CONF_USB_90D_DDR_EN (1UL << 6)
106 #define TLL_SHARED_CONF_USB_180D_SDR_EN (1UL << 5)
107 #define TLL_SHARED_CONF_USB_DIVRATIO_MASK (7UL << 2)
108 #define TLL_SHARED_CONF_USB_DIVRATIO_128 (7UL << 2)
109 #define TLL_SHARED_CONF_USB_DIVRATIO_64 (6UL << 2)
110 #define TLL_SHARED_CONF_USB_DIVRATIO_32 (5UL << 2)
111 #define TLL_SHARED_CONF_USB_DIVRATIO_16 (4UL << 2)
112 #define TLL_SHARED_CONF_USB_DIVRATIO_8 (3UL << 2)
113 #define TLL_SHARED_CONF_USB_DIVRATIO_4 (2UL << 2)
114 #define TLL_SHARED_CONF_USB_DIVRATIO_2 (1UL << 2)
115 #define TLL_SHARED_CONF_USB_DIVRATIO_1 (0UL << 2)
116 #define TLL_SHARED_CONF_FCLK_REQ (1UL << 1)
117 #define TLL_SHARED_CONF_FCLK_IS_ON (1UL << 0)
118
119 #define TLL_CHANNEL_CONF_DRVVBUS (1UL << 16)
120 #define TLL_CHANNEL_CONF_CHRGVBUS (1UL << 15)
121 #define TLL_CHANNEL_CONF_ULPINOBITSTUFF (1UL << 11)
122 #define TLL_CHANNEL_CONF_ULPIAUTOIDLE (1UL << 10)
123 #define TLL_CHANNEL_CONF_UTMIAUTOIDLE (1UL << 9)
124 #define TLL_CHANNEL_CONF_ULPIDDRMODE (1UL << 8)
125 #define TLL_CHANNEL_CONF_ULPIOUTCLKMODE (1UL << 7)
126 #define TLL_CHANNEL_CONF_TLLFULLSPEED (1UL << 6)
127 #define TLL_CHANNEL_CONF_TLLCONNECT (1UL << 5)
128 #define TLL_CHANNEL_CONF_TLLATTACH (1UL << 4)
129 #define TLL_CHANNEL_CONF_UTMIISADEV (1UL << 3)
130 #define TLL_CHANNEL_CONF_CHANEN (1UL << 0)
131
132 struct omap_tll_softc {
133 device_t sc_dev;
134
135 /* TLL register set */
136 struct resource* tll_mem_res;
137 int tll_mem_rid;
138 };
139
140 static struct omap_tll_softc *omap_tll_sc;
141
142 static int omap_tll_attach(device_t dev);
143 static int omap_tll_detach(device_t dev);
144
145 static inline uint32_t
omap_tll_read_4(struct omap_tll_softc * sc,bus_size_t off)146 omap_tll_read_4(struct omap_tll_softc *sc, bus_size_t off)
147 {
148 return bus_read_4(sc->tll_mem_res, off);
149 }
150
151 static inline void
omap_tll_write_4(struct omap_tll_softc * sc,bus_size_t off,uint32_t val)152 omap_tll_write_4(struct omap_tll_softc *sc, bus_size_t off, uint32_t val)
153 {
154 bus_write_4(sc->tll_mem_res, off, val);
155 }
156
157 void
omap_tll_utmi_enable(unsigned int en_mask)158 omap_tll_utmi_enable(unsigned int en_mask)
159 {
160 struct omap_tll_softc *sc;
161 unsigned int i;
162 uint32_t reg;
163
164 sc = omap_tll_sc;
165 if (sc == NULL)
166 return;
167
168 /* There are 3 TLL channels, one per USB controller so set them all up the
169 * same, SDR mode, bit stuffing and no autoidle.
170 */
171 for (i=0; i<3; i++) {
172 reg = omap_tll_read_4(sc, OMAP_USBTLL_TLL_CHANNEL_CONF(i));
173
174 reg &= ~(TLL_CHANNEL_CONF_UTMIAUTOIDLE
175 | TLL_CHANNEL_CONF_ULPINOBITSTUFF
176 | TLL_CHANNEL_CONF_ULPIDDRMODE);
177
178 omap_tll_write_4(sc, OMAP_USBTLL_TLL_CHANNEL_CONF(i), reg);
179 }
180
181 /* Program the common TLL register */
182 reg = omap_tll_read_4(sc, OMAP_USBTLL_TLL_SHARED_CONF);
183
184 reg &= ~( TLL_SHARED_CONF_USB_90D_DDR_EN
185 | TLL_SHARED_CONF_USB_DIVRATIO_MASK);
186 reg |= ( TLL_SHARED_CONF_FCLK_IS_ON
187 | TLL_SHARED_CONF_USB_DIVRATIO_2
188 | TLL_SHARED_CONF_USB_180D_SDR_EN);
189
190 omap_tll_write_4(sc, OMAP_USBTLL_TLL_SHARED_CONF, reg);
191
192 /* Enable channels now */
193 for (i = 0; i < 3; i++) {
194 reg = omap_tll_read_4(sc, OMAP_USBTLL_TLL_CHANNEL_CONF(i));
195
196 /* Enable only the reg that is needed */
197 if ((en_mask & (1 << i)) == 0)
198 continue;
199
200 reg |= TLL_CHANNEL_CONF_CHANEN;
201 omap_tll_write_4(sc, OMAP_USBTLL_TLL_CHANNEL_CONF(i), reg);
202 }
203 }
204
205 static int
omap_tll_init(struct omap_tll_softc * sc)206 omap_tll_init(struct omap_tll_softc *sc)
207 {
208 unsigned long timeout;
209 int ret = 0;
210
211 /* Enable the USB TLL */
212 ti_sysc_clock_enable(device_get_parent(sc->sc_dev));
213
214 /* Perform TLL soft reset, and wait until reset is complete */
215 omap_tll_write_4(sc, OMAP_USBTLL_SYSCONFIG, TLL_SYSCONFIG_SOFTRESET);
216
217 /* Set the timeout to 100ms*/
218 timeout = (hz < 10) ? 1 : ((100 * hz) / 1000);
219
220 /* Wait for TLL reset to complete */
221 while ((omap_tll_read_4(sc, OMAP_USBTLL_SYSSTATUS) &
222 TLL_SYSSTATUS_RESETDONE) == 0x00) {
223 /* Sleep for a tick */
224 pause("USBRESET", 1);
225
226 if (timeout-- == 0) {
227 device_printf(sc->sc_dev, "TLL reset operation timed out\n");
228 ret = EINVAL;
229 goto err_sys_status;
230 }
231 }
232
233 /* CLOCKACTIVITY = 1 : OCP-derived internal clocks ON during idle
234 * SIDLEMODE = 2 : Smart-idle mode. Sidleack asserted after Idlereq
235 * assertion when no more activity on the USB.
236 * ENAWAKEUP = 1 : Wakeup generation enabled
237 */
238 omap_tll_write_4(sc, OMAP_USBTLL_SYSCONFIG, TLL_SYSCONFIG_ENAWAKEUP |
239 TLL_SYSCONFIG_AUTOIDLE |
240 TLL_SYSCONFIG_SIDLE_SMART_IDLE |
241 TLL_SYSCONFIG_CACTIVITY);
242
243 return(0);
244
245 err_sys_status:
246 /* Disable the TLL clocks */
247 ti_sysc_clock_disable(device_get_parent(sc->sc_dev));
248
249 return(ret);
250 }
251
252 static void
omap_tll_disable(struct omap_tll_softc * sc)253 omap_tll_disable(struct omap_tll_softc *sc)
254 {
255 unsigned long timeout;
256
257 timeout = (hz < 10) ? 1 : ((100 * hz) / 1000);
258
259 /* Reset the TLL module */
260 omap_tll_write_4(sc, OMAP_USBTLL_SYSCONFIG, 0x0002);
261 while ((omap_tll_read_4(sc, OMAP_USBTLL_SYSSTATUS) & (0x01)) == 0x00) {
262 /* Sleep for a tick */
263 pause("USBRESET", 1);
264
265 if (timeout-- == 0) {
266 device_printf(sc->sc_dev, "operation timed out\n");
267 break;
268 }
269 }
270
271 /* Disable functional and interface clocks for the TLL and HOST modules */
272 ti_sysc_clock_disable(device_get_parent(sc->sc_dev));
273 }
274
275 static int
omap_tll_probe(device_t dev)276 omap_tll_probe(device_t dev)
277 {
278
279 if (!ofw_bus_status_okay(dev))
280 return (ENXIO);
281
282 if (!ofw_bus_is_compatible(dev, "ti,usbhs-tll"))
283 return (ENXIO);
284
285 device_set_desc(dev, "TI OMAP USB 2.0 TLL module");
286
287 return (BUS_PROBE_DEFAULT);
288 }
289
290 static int
omap_tll_attach(device_t dev)291 omap_tll_attach(device_t dev)
292 {
293 struct omap_tll_softc *sc;
294
295 sc = device_get_softc(dev);
296 /* save the device */
297 sc->sc_dev = dev;
298
299 /* Allocate resource for the TLL register set */
300 sc->tll_mem_rid = 0;
301 sc->tll_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
302 &sc->tll_mem_rid, RF_ACTIVE);
303 if (!sc->tll_mem_res) {
304 device_printf(dev, "Error: Could not map TLL memory\n");
305 goto error;
306 }
307
308 omap_tll_init(sc);
309
310 omap_tll_sc = sc;
311
312 return (0);
313
314 error:
315 omap_tll_detach(dev);
316 return (ENXIO);
317 }
318
319 static int
omap_tll_detach(device_t dev)320 omap_tll_detach(device_t dev)
321 {
322 struct omap_tll_softc *sc;
323
324 sc = device_get_softc(dev);
325 omap_tll_disable(sc);
326
327 /* Release the other register set memory maps */
328 if (sc->tll_mem_res) {
329 bus_release_resource(dev, SYS_RES_MEMORY,
330 sc->tll_mem_rid, sc->tll_mem_res);
331 sc->tll_mem_res = NULL;
332 }
333
334 omap_tll_sc = NULL;
335
336 return (0);
337 }
338
339 static device_method_t omap_tll_methods[] = {
340 /* Device interface */
341 DEVMETHOD(device_probe, omap_tll_probe),
342 DEVMETHOD(device_attach, omap_tll_attach),
343 DEVMETHOD(device_detach, omap_tll_detach),
344 DEVMETHOD(device_suspend, bus_generic_suspend),
345 DEVMETHOD(device_resume, bus_generic_resume),
346 DEVMETHOD(device_shutdown, bus_generic_shutdown),
347 {0, 0}
348 };
349
350 static driver_t omap_tll_driver = {
351 "omap_tll",
352 omap_tll_methods,
353 sizeof(struct omap_tll_softc),
354 };
355
356 DRIVER_MODULE(omap_tll, simplebus, omap_tll_driver, 0, 0);
357