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Searched refs:TEGRA234_CLK_PLLP_OUT0 (Results 1 – 5 of 5) sorted by relevance

/freebsd/sys/contrib/device-tree/src/arm64/nvidia/
H A Dtegra234-p3768-0000+p3767-0000.dts34 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
H A Dtegra234.dtsi183 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
711 <&bpmp TEGRA234_CLK_PLLP_OUT0>;
713 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
730 <&bpmp TEGRA234_CLK_PLLP_OUT0>;
732 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
749 <&bpmp TEGRA234_CLK_PLLP_OUT0>;
751 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
768 <&bpmp TEGRA234_CLK_PLLP_OUT0>;
770 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
787 <&bpmp TEGRA234_CLK_PLLP_OUT0>;
[all...]
H A Dtegra234-p3768-0000.dtsi38 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
H A Dtegra234-p3737-0000+p3701-0000.dts39 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
/freebsd/sys/contrib/device-tree/include/dt-bindings/clock/
H A Dtegra234-clock.h205 #define TEGRA234_CLK_PLLP_OUT0 102U macro