Searched refs:TEGRA210_CLK_HCLK (Results 1 – 2 of 2) sorted by relevance
326 #define TEGRA210_CLK_HCLK 292 macro
245 GATE_INV(TEGRA210_CLK_HCLK, "hclk", "hclk_div", CLK_SYSTEM_RATE, 7),