Searched refs:SwitchOp (Results 1 – 8 of 8) sorted by relevance
| /freebsd/contrib/llvm-project/clang/lib/CIR/Dialect/Transforms/ |
| H A D | CIRCanonicalize.cpp | 87 struct RemoveEmptySwitch : public OpRewritePattern<SwitchOp> {
88 using OpRewritePattern<SwitchOp>::OpRewritePattern;
90 LogicalResult matchAndRewrite(SwitchOp op, in matchAndRewrite()
143 if (isa<BrOp, BrCondOp, CastOp, ScopeOp, SwitchOp, SelectOp, UnaryOp, in runOnOperation()
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| H A D | CIRSimplify.cpp | 194 struct SimplifySwitch : public OpRewritePattern<SwitchOp> {
195 using OpRewritePattern<SwitchOp>::OpRewritePattern;
196 LogicalResult matchAndRewrite(SwitchOp op, in matchAndRewrite()
317 if (isa<TernaryOp, SelectOp, SwitchOp, VecSplatOp>(op)) in runOnOperation()
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| H A D | FlattenCFG.cpp | 174 class CIRSwitchOpFlattening : public mlir::OpRewritePattern<cir::SwitchOp> {
176 using OpRewritePattern<cir::SwitchOp>::OpRewritePattern;
187 Block *condBrToRangeDestination(cir::SwitchOp op, in condBrToRangeDestination()
222 matchAndRewrite(cir::SwitchOp op, in matchAndRewrite()
313 walkRegionSkipping<cir::LoopOpInterface, cir::SwitchOp>( in matchAndRewrite()
552 if (isa<IfOp, ScopeOp, SwitchOp, LoopOpInterface, TernaryOp>(op)) in runOnOperation()
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| /freebsd/contrib/llvm-project/clang/lib/CIR/Dialect/IR/ |
| H A D | CIRDialect.cpp | 262 !getOperation()->getParentOfType<SwitchOp>()) in verify()
1063 static void printSwitchOp(OpAsmPrinter &p, cir::SwitchOp op, in printSwitchOp()
1077 void cir::SwitchOp::getSuccessorRegions( in getSuccessorRegions()
1087 void cir::SwitchOp::build(OpBuilder &builder, OperationState &result, in build()
1097 void cir::SwitchOp::collectCases(llvm::SmallVectorImpl<CaseOp> &cases) { in collectCases()
1100 if (isa<cir::SwitchOp>(op) && op != *this) in collectCases()
1110 bool cir::SwitchOp::isSimpleForm(llvm::SmallVectorImpl<CaseOp> &cases) { in isSimpleForm()
1124 return op->getParentOfType<SwitchOp>() == *this; in isSimpleForm()
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| /freebsd/contrib/llvm-project/clang/lib/CIR/CodeGen/ |
| H A D | CIRGenStmt.cpp | 868 SwitchOp swop; in emitSwitchStmt()
886 swop = builder.create<SwitchOp>( in emitSwitchStmt()
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| /freebsd/contrib/llvm-project/clang/include/clang/CIR/Dialect/IR/ |
| H A D | CIROps.td | 465 "SwitchOp", "DoWhileOp","WhileOp",
605 "IfOp", "ScopeOp", "SwitchOp",
750 // SwitchOp
794 def SwitchOp : CIR_Op<"switch",
941 custom<SwitchOp>(
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGBuilder.cpp | 2971 SDValue SwitchOp = getValue(JTH.SValue); in visitJumpTableHeader() local
2972 EVT VT = SwitchOp.getValueType(); in visitJumpTableHeader()
2973 SDValue Sub = DAG.getNode(ISD::SUB, dl, VT, SwitchOp, in visitJumpTableHeader()
2982 SwitchOp = in visitJumpTableHeader()
2988 DAG.getCopyToReg(getControlRoot(), dl, JumpTableReg, SwitchOp); in visitJumpTableHeader()
3229 SDValue SwitchOp = getValue(B.SValue); in visitBitTestHeader() local
3230 EVT VT = SwitchOp.getValueType(); in visitBitTestHeader()
3232 DAG.getNode(ISD::SUB, dl, VT, SwitchOp, DAG.getConstant(B.First, dl, VT)); in visitBitTestHeader()
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| /freebsd/contrib/llvm-project/clang/lib/CIR/Lowering/DirectToLLVM/ |
| H A D | LowerToLLVM.cpp | 1378 rewriter.replaceOpWithNewOp<mlir::LLVM::SwitchOp>( in matchAndRewrite()
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