| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ScheduleDAGVLIW.cpp | 110 SUnit *SuccSU = D.getSUnit(); in releaseSucc() local
113 if (SuccSU->NumPredsLeft == 0) { in releaseSucc()
115 dumpNode(*SuccSU); in releaseSucc()
122 --SuccSU->NumPredsLeft; in releaseSucc()
124 SuccSU->setDepthToAtLeast(SU->getDepth() + D.getLatency()); in releaseSucc()
128 if (SuccSU->NumPredsLeft == 0 && SuccSU != &ExitSU) { in releaseSucc()
129 PendingQueue.push_back(SuccSU); in releaseSucc()
|
| H A D | ScheduleDAGRRList.cpp | 1198 SUnit *SuccSU = Succ.getSUnit(); in CopyAndMoveSuccessors() local
1199 if (SuccSU->isScheduled) { in CopyAndMoveSuccessors()
1202 AddPredQueued(SuccSU, D); in CopyAndMoveSuccessors()
1204 DelDeps.emplace_back(SuccSU, D); in CopyAndMoveSuccessors()
1237 SUnit *SuccSU = Succ.getSUnit(); in InsertCopiesAndMoveSuccs() local
1238 if (SuccSU->isScheduled) { in InsertCopiesAndMoveSuccs()
1241 AddPredQueued(SuccSU, D); in InsertCopiesAndMoveSuccs()
1242 DelDeps.emplace_back(SuccSU, Succ); in InsertCopiesAndMoveSuccs()
1248 AddPredQueued(SuccSU, SDep(CopyFromSU, SDep::Artificial)); in InsertCopiesAndMoveSuccs()
2401 const SUnit *SuccSU = Succ.getSUnit(); in hasOnlyLiveOutUses() local
[all …]
|
| H A D | ScheduleDAGFast.cpp | 354 SUnit *SuccSU = Succ.getSUnit(); in CopyAndMoveSuccessors() local
355 if (SuccSU->isScheduled) { in CopyAndMoveSuccessors()
358 AddPred(SuccSU, D); in CopyAndMoveSuccessors()
360 DelDeps.push_back(std::make_pair(SuccSU, D)); in CopyAndMoveSuccessors()
390 SUnit *SuccSU = Succ.getSUnit(); in InsertCopiesAndMoveSuccs() local
391 if (SuccSU->isScheduled) { in InsertCopiesAndMoveSuccs()
394 AddPred(SuccSU, D); in InsertCopiesAndMoveSuccs()
395 DelDeps.push_back(std::make_pair(SuccSU, Succ)); in InsertCopiesAndMoveSuccs()
|
| H A D | ResourcePriorityQueue.cpp | 111 SUnit *SuccSU = Succ.getSUnit(); in numberRCValSuccInSU() local
112 const SDNode *ScegN = SuccSU->getNode(); in numberRCValSuccInSU()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | GCNMinRegStrategy.cpp | 215 auto SuccSU = S.getSUnit(); in releaseSuccessors() local
218 assert(SuccSU->isBoundaryNode() || getNumPreds(SuccSU) > 0); in releaseSuccessors()
219 if (!SuccSU->isBoundaryNode() && decNumPreds(SuccSU) == 0) in releaseSuccessors()
220 RQ.push_front(*new (Alloc.Allocate()) Candidate(SuccSU, Priority)); in releaseSuccessors()
|
| H A D | SIMachineScheduler.cpp | 433 SUnit *SuccSU = SuccEdge->getSUnit(); in undoReleaseSucc() local
436 ++SuccSU->WeakPredsLeft; in undoReleaseSucc()
439 ++SuccSU->NumPredsLeft; in undoReleaseSucc()
443 SUnit *SuccSU = SuccEdge->getSUnit(); in releaseSucc() local
446 --SuccSU->WeakPredsLeft; in releaseSucc()
450 if (SuccSU->NumPredsLeft == 0) { in releaseSucc()
452 DAG->dumpNode(*SuccSU); in releaseSucc()
458 --SuccSU->NumPredsLeft; in releaseSucc()
464 SUnit *SuccSU = Succ.getSUnit(); in releaseSuccessors() local
466 if (SuccSU->NodeNum >= DAG->SUnits.size()) in releaseSuccessors()
[all …]
|
| H A D | AMDGPUIGroupLP.cpp | 1417 for (auto &SuccSU : MFMAPipeCands) { in analyzeDAG() local
1418 if (DAG->IsReachable(SuccSU, PredSU)) { in analyzeDAG()
1421 TempMFMA = SuccSU; in analyzeDAG()
1423 MFMAPipeSUs.push_back(SuccSU); in analyzeDAG()
1440 for (auto &SuccSU : MFMAPipeCands) { in analyzeDAG() local
1443 [&SuccSU](SUnit *PotentialMatch) { in analyzeDAG()
1444 return PotentialMatch->NodeNum == SuccSU->NodeNum; in analyzeDAG()
1449 if (DAG->IsReachable(SuccSU, PredSU)) { in analyzeDAG()
1450 MFMAPipeSUs.push_back(SuccSU); in analyzeDAG()
1462 for (auto &SuccSU : CvtSUs) { in analyzeDAG() local
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | PostRASchedulerList.cpp | 450 SUnit *SuccSU = SuccEdge->getSUnit(); in ReleaseSucc() local
453 --SuccSU->WeakPredsLeft; in ReleaseSucc()
457 if (SuccSU->NumPredsLeft == 0) { in ReleaseSucc()
459 dumpNode(*SuccSU); in ReleaseSucc()
464 --SuccSU->NumPredsLeft; in ReleaseSucc()
479 if (SuccSU->NumPredsLeft == 0 && SuccSU != &ExitSU) in ReleaseSucc()
480 PendingQueue.push_back(SuccSU); in ReleaseSucc()
|
| H A D | ScheduleDAG.cpp | 226 SUnit *SuccSU = SuccDep.getSUnit(); in setDepthDirty() local
227 if (SuccSU->isDepthCurrent) in setDepthDirty()
228 WorkList.push_back(SuccSU); in setDepthDirty()
305 SUnit *SuccSU = SuccDep.getSUnit(); in ComputeHeight() local
306 if (SuccSU->isHeightCurrent) in ComputeHeight()
308 SuccSU->Height + SuccDep.getLatency()); in ComputeHeight()
311 WorkList.push_back(SuccSU); in ComputeHeight()
|
| H A D | ScheduleDAGInstrs.cpp | 1218 bool ScheduleDAGInstrs::canAddEdge(SUnit *SuccSU, SUnit *PredSU) { in canAddEdge() argument
1219 return SuccSU == &ExitSU || !Topo.IsReachable(PredSU, SuccSU); in canAddEdge()
1222 bool ScheduleDAGInstrs::addEdge(SUnit *SuccSU, const SDep &PredDep) { in addEdge() argument
1223 if (SuccSU != &ExitSU) { in addEdge()
1226 if (Topo.IsReachable(PredDep.getSUnit(), SuccSU)) in addEdge()
1228 Topo.AddPredQueued(SuccSU, PredDep.getSUnit()); in addEdge()
1230 SuccSU->addPred(PredDep, /*Required=*/!PredDep.isArtificial()); in addEdge()
|
| H A D | MachinePipeliner.cpp | 792 SUnit *SuccSU = SI.getSUnit(); in isSuccOrder() local
794 if (Visited.count(SuccSU)) in isSuccOrder()
796 if (SuccSU == SUb) in isSuccOrder()
798 Worklist.push_back(SuccSU); in isSuccOrder()
799 Visited.insert(SuccSU); in isSuccOrder()
2888 SUnit *SuccSU = Cur.getSUnit(); in latestCycleInChain() local
2889 if (Visited.count(SuccSU) || SuccSU->isBoundaryNode()) in latestCycleInChain()
2891 std::map<SUnit *, int>::const_iterator it = InstrToCycle.find(SuccSU); in latestCycleInChain()
2895 for (const auto &SI : SuccSU->Succs) in latestCycleInChain()
2898 Visited.insert(SuccSU); in latestCycleInChain()
[all …]
|
| H A D | MachineScheduler.cpp | 707 SUnit *SuccSU = SuccEdge->getSUnit(); in releaseSucc() local
710 --SuccSU->WeakPredsLeft; in releaseSucc()
712 NextClusterSucc = SuccSU; in releaseSucc()
716 if (SuccSU->NumPredsLeft == 0) { in releaseSucc()
718 dumpNode(*SuccSU); in releaseSucc()
725 if (SuccSU->TopReadyCycle < SU->TopReadyCycle + SuccEdge->getLatency()) in releaseSucc()
726 SuccSU->TopReadyCycle = SU->TopReadyCycle + SuccEdge->getLatency(); in releaseSucc()
728 --SuccSU->NumPredsLeft; in releaseSucc()
729 if (SuccSU->NumPredsLeft == 0 && SuccSU != &ExitSU) in releaseSucc()
730 SchedImpl->releaseTopNode(SuccSU); in releaseSucc()
|
| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ScheduleDAGInstrs.h | 361 bool canAddEdge(SUnit *SuccSU, SUnit *PredSU);
368 bool addEdge(SUnit *SuccSU, const SDep &PredDep);
|