Searched refs:SuccPred (Results 1 – 3 of 3) sorted by relevance
928 for (MachineBasicBlock *SuccPred : Succ->predecessors()) { in isProfitableToTailDup()929 if (SuccPred == Succ || SuccPred == BB || in isProfitableToTailDup()930 BlockToChain[SuccPred] == &Chain || in isProfitableToTailDup()931 (BlockFilter && !BlockFilter->count(SuccPred))) in isProfitableToTailDup()934 MBFI->getBlockFreq(SuccPred) * MBPI->getEdgeProbability(SuccPred, Succ); in isProfitableToTailDup()1045 for (auto *SuccPred : Succ->predecessors()) { in isTrellis() local1047 if (Successors.count(SuccPred)) { in isTrellis()1049 for (MachineBasicBlock *CheckSucc : SuccPred->successors()) in isTrellis()1054 const BlockChain *PredChain = BlockToChain[SuccPred]; in isTrellis()1055 if (SuccPred == BB || (BlockFilter && !BlockFilter->count(SuccPred)) || in isTrellis()[all …]
2868 for (const SDep &SuccPred : SuccSU->Preds) { in canClobberReachingPhysRegUse() local2869 if (!SuccPred.isAssignedRegDep()) in canClobberReachingPhysRegUse()2873 MachineOperand::clobbersPhysReg(RegMask, SuccPred.getReg()) && in canClobberReachingPhysRegUse()2874 scheduleDAG->IsReachable(DepSU, SuccPred.getSUnit())) in canClobberReachingPhysRegUse()2881 if (TRI->regsOverlap(ImpDef, SuccPred.getReg()) && in canClobberReachingPhysRegUse()2882 scheduleDAG->IsReachable(DepSU, SuccPred.getSUnit())) in canClobberReachingPhysRegUse()
1036 for (BasicBlock *SuccPred : predecessors(Succ)) { in CanRedirectPredsOfEmptyBBToSucc()1037 if (BBPreds.count(SuccPred)) { in CanRedirectPredsOfEmptyBBToSucc()1040 CommonPred = SuccPred; in CanRedirectPredsOfEmptyBBToSucc()