Searched refs:SubVec1 (Results 1 – 2 of 2) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 8009 SDValue SubVec1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, SL, PackVT, SrcOp1, in lowerVECTOR_SHUFFLE() local
8018 if (SubVec0 != SubVec1) { in lowerVECTOR_SHUFFLE()
8020 Result1 = SubVec1; in lowerVECTOR_SHUFFLE()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 5482 auto PerformShuffle = [&, &DAG = DAG](SDValue SubVec1, SDValue SubVec2, in lowerShuffleViaVRegSplitting()
5484 SDValue SubVec = DAG.getVectorShuffle(OneRegVT, DL, SubVec1, SubVec2, Mask); in lowerShuffleViaVRegSplitting()
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