/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeVectorTypes.cpp | 3484 EVT SubVT = N->getValueType(0); in SplitVecOp_EXTRACT_SUBVECTOR() 3495 assert(IdxVal + SubVT.getVectorMinNumElements() <= LoEltsMin && in SplitVecOp_EXTRACT_SUBVECTOR() 3497 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, SubVT, Lo, Idx); in SplitVecOp_EXTRACT_SUBVECTOR() 3498 } else if (SubVT.isScalableVector() == in SplitVecOp_EXTRACT_SUBVECTOR() 3500 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, SubVT, Hi, in SplitVecOp_EXTRACT_SUBVECTOR() 3505 assert(SubVT.isFixedLengthVector() && in SplitVecOp_EXTRACT_SUBVECTOR() 3512 if (SubVT.getScalarType() == MVT::i1) in SplitVecOp_EXTRACT_SUBVECTOR() 3531 StackPtr = TLI.getVectorSubVecPointer(DAG, StackPtr, VecVT, SubVT, Idx); in SplitVecOp_EXTRACT_SUBVECTOR() 3534 SubVT, dl, Store, StackPtr, in SplitVecOp_EXTRACT_VECTOR_ELT() 5999 EVT SubVT in convertMask() 3480 EVT SubVT = N->getValueType(0); SplitVecOp_EXTRACT_SUBVECTOR() local 5995 EVT SubVT = Mask->getValueType(0); convertMask() local 6794 EVT SubVT = SubVec.getValueType(); WidenVecOp_INSERT_SUBVECTOR() local [all...] |
H A D | DAGCombiner.cpp | 3743 EVT SubVT = N->getValueType(0); in foldSubToUSubSat() local 3753 return getTruncatedUSUBSAT(DstVT, SubVT, MaxRHS, Op1, DAG, DL); in foldSubToUSubSat() 3755 return getTruncatedUSUBSAT(DstVT, SubVT, MaxLHS, Op1, DAG, DL); in foldSubToUSubSat() 3762 return getTruncatedUSUBSAT(DstVT, SubVT, Op0, MinRHS, DAG, DL); in foldSubToUSubSat() 3764 return getTruncatedUSUBSAT(DstVT, SubVT, Op0, MinLHS, DAG, DL); in foldSubToUSubSat() 23900 EVT SubVT; in combineConcatVectorOfConcatVectors() local 23908 SubVT = Op.getOperand(0).getValueType(); in combineConcatVectorOfConcatVectors() 23909 if (!DAG.getTargetLoweringInfo().isTypeLegal(SubVT)) in combineConcatVectorOfConcatVectors() 23914 if (SubVT != Op.getOperand(0).getValueType()) in combineConcatVectorOfConcatVectors() 23922 ConcatOps.append(FirstConcat->getNumOperands(), DAG.getUNDEF(SubVT)); in combineConcatVectorOfConcatVectors() [all …]
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H A D | SelectionDAG.cpp | 3361 EVT SubVT = N0.getValueType(); in computeKnownBits() local 3362 unsigned SubBitWidth = SubVT.getScalarSizeInBits(); in computeKnownBits() 3365 if (!(SubVT.isInteger() || SubVT.isFloatingPoint())) in computeKnownBits() 12301 EVT SubVT = EVT::getVectorVT(*getContext(), OpSVT, NumSubElts); in matchBinOpReduction() local 12302 if (!TLI->isExtractSubvectorCheap(SubVT, OpVT, 0)) in matchBinOpReduction() 12305 return getNode(ISD::EXTRACT_SUBVECTOR, SDLoc(Op), SubVT, Op, in matchBinOpReduction()
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H A D | TargetLowering.cpp | 1330 EVT SubVT = Op.getOperand(0).getValueType(); in SimplifyDemandedBits() local 1332 unsigned NumSubElts = SubVT.getVectorNumElements(); in SimplifyDemandedBits() 3273 EVT SubVT = Op.getOperand(0).getValueType(); in SimplifyDemandedVectorElts() local 3275 unsigned NumSubElts = SubVT.getVectorNumElements(); in SimplifyDemandedVectorElts()
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
H A D | VPlanRecipes.cpp | 2322 auto *SubVT = VectorType::get(ScalarTy, State.VF); in execute() local 2341 Value *Undef = PoisonValue::get(SubVT); in execute() 2354 if (StoredVec->getType() != SubVT) in execute() 2355 StoredVec = createBitOrPointerCast(State.Builder, StoredVec, SubVT, DL); in execute()
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelDAGToDAG.cpp | 1082 MVT SubVT = MVT::getVectorVT(MaxVT.getScalarType(), NumSubElts); in PreprocessISelDAG() local 1083 SDValue Extract = CurDAG->getNode(ISD::EXTRACT_SUBVECTOR, dl, SubVT, in PreprocessISelDAG() 4337 EVT SubVT = ShiftAmt.getValueType(); in tryShiftAmountMod() local 4347 SubVT = Add1.getValueType(); in tryShiftAmountMod() 4349 if (Add0.getValueType() != SubVT) { in tryShiftAmountMod() 4350 Add0 = CurDAG->getZExtOrTrunc(Add0, DL, SubVT); in tryShiftAmountMod() 4354 X = CurDAG->getNode(ISD::ADD, DL, SubVT, Add1, Add0); in tryShiftAmountMod() 4361 SDValue Zero = CurDAG->getConstant(0, DL, SubVT); in tryShiftAmountMod() 4362 SDValue Neg = CurDAG->getNode(ISD::SUB, DL, SubVT, Zero, X); in tryShiftAmountMod()
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H A D | X86ISelLowering.cpp | 4065 EVT SubVT = Sub.getValueType(); in collectConcatOps() local 4067 if (VT.getSizeInBits() == (SubVT.getSizeInBits() * 2)) { in collectConcatOps() 4071 Ops.push_back(DAG.getUNDEF(SubVT)); in collectConcatOps() 4077 Src.getOperand(1).getValueType() == SubVT && in collectConcatOps() 4102 Ops.push_back(DAG.getUNDEF(SubVT)); in collectConcatOps() 4493 EVT SubVT = V1.getValueType(); in concatSubVectors() local 4494 EVT SubSVT = SubVT.getScalarType(); in concatSubVectors() 4495 unsigned SubNumElts = SubVT.getVectorNumElements(); in concatSubVectors() 4496 unsigned SubVectorWidth = SubVT.getSizeInBits(); in concatSubVectors() 5904 EVT SubVT = Sub.getValueType(); in getFauxShuffleMask() local [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 3786 EVT SubVT = ShiftAmt->getValueType(0); in tryShiftAmountMod() local 3787 if (SubVT == MVT::i32) { in tryShiftAmountMod() 3791 assert(SubVT == MVT::i64); in tryShiftAmountMod() 3796 CurDAG->getCopyFromReg(CurDAG->getEntryNode(), DL, ZeroReg, SubVT); in tryShiftAmountMod() 3798 CurDAG->getMachineNode(NegOpc, DL, SubVT, Zero, Add1); in tryShiftAmountMod() 3806 EVT SubVT = ShiftAmt->getValueType(0); in tryShiftAmountMod() local 3807 if (SubVT == MVT::i32) { in tryShiftAmountMod() 3811 assert(SubVT == MVT::i64); in tryShiftAmountMod() 3816 CurDAG->getCopyFromReg(CurDAG->getEntryNode(), DL, ZeroReg, SubVT); in tryShiftAmountMod() 3818 CurDAG->getMachineNode(NotOpc, DL, SubVT, Zero, Add1); in tryShiftAmountMod()
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H A D | AArch64ISelLowering.cpp | 14294 EVT SubVT = VT.getHalfNumVectorElementsVT(*DAG.getContext()); in LowerBUILD_VECTOR() local 14295 if (isTypeLegal(SubVT) && SubVT.isVector() && in LowerBUILD_VECTOR() 14296 SubVT.getVectorNumElements() >= 2) { in LowerBUILD_VECTOR() 14300 LowerBUILD_VECTOR(DAG.getBuildVector(SubVT, dl, Ops1), DAG); in LowerBUILD_VECTOR() 14302 LowerBUILD_VECTOR(DAG.getBuildVector(SubVT, dl, Ops2), DAG); in LowerBUILD_VECTOR() 14410 EVT SubVT = V1.getValueType(); in LowerCONCAT_VECTORS() local 14411 EVT PairVT = SubVT.getDoubleNumVectorElementsVT(*DAG.getContext()); in LowerCONCAT_VECTORS() 19562 EVT SubVT = SubVec.getValueType(); in performInsertSubvectorCombine() local 19567 !DAG.getTargetLoweringInfo().isTypeLegal(SubVT)) in performInsertSubvectorCombine() 19575 unsigned NumSubElts = SubVT.getVectorNumElements(); in performInsertSubvectorCombine() [all …]
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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | BasicTTIImpl.h | 1420 auto *SubVT = FixedVectorType::get(VT->getElementType(), NumSubElts); variable 1495 SubVT, DemandedAllSubElts, 1516 SubVT, DemandedAllSubElts,
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 8928 EVT SubVT = SubV1.getValueType(); in LowerVECTOR_SHUFFLE() local 8936 ShuffleMask, SubVT, WhichResult, isV_UNDEF)) { in LowerVECTOR_SHUFFLE() 8941 SDValue Res = DAG.getNode(ShuffleOpc, dl, DAG.getVTList(SubVT, SubVT), in LowerVECTOR_SHUFFLE() 9273 EVT SubVT = MVT::v4i32; in LowerEXTRACT_SUBVECTOR() local 9274 SDValue SubVec = DAG.getNode(ISD::UNDEF, dl, SubVT); in LowerEXTRACT_SUBVECTOR() 9278 SubVec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, SubVT, SubVec, Elt, in LowerEXTRACT_SUBVECTOR() 9280 SubVec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, SubVT, SubVec, Elt, in LowerEXTRACT_SUBVECTOR() 9288 EVT SubVT = MVT::getVectorVT(ElType, NumElts); in LowerEXTRACT_SUBVECTOR() local 9289 SDValue SubVec = DAG.getNode(ISD::UNDEF, dl, SubVT); in LowerEXTRACT_SUBVECTOR() 9293 SubVec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, SubVT, SubVec, Elt, in LowerEXTRACT_SUBVECTOR() [all …]
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