Searched refs:SubV (Results 1 – 3 of 3) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLoweringHVX.cpp | 1221 SDValue SubV = DAG.getNode(ISD::SUB, dl, MVT::i32, in insertHvxElementReg() local 1223 SDValue TorV = DAG.getNode(HexagonISD::VROR, dl, VecTy, {InsV, SubV}); in insertHvxElementReg() 1374 HexagonTargetLowering::insertHvxSubvectorReg(SDValue VecV, SDValue SubV, in insertHvxSubvectorReg() argument 1377 MVT SubTy = ty(SubV); in insertHvxSubvectorReg() 1401 return DAG.getTargetInsertSubreg(SubIdx, dl, VecTy, VecV, SubV); in insertHvxSubvectorReg() 1406 SDValue InLo = DAG.getNode(ISD::CONCAT_VECTORS, dl, VecTy, {SubV, V1}); in insertHvxSubvectorReg() 1407 SDValue InHi = DAG.getNode(ISD::CONCAT_VECTORS, dl, VecTy, {V0, SubV}); in insertHvxSubvectorReg() 1433 SDValue V = DAG.getBitcast(MVT::i32, SubV); in insertHvxSubvectorReg() 1436 SDValue V = DAG.getBitcast(MVT::i64, SubV); in insertHvxSubvectorReg() 1461 HexagonTargetLowering::insertHvxSubvectorPred(SDValue VecV, SDValue SubV, in insertHvxSubvectorPred() argument [all …]
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| H A D | HexagonISelLowering.h | 531 SDValue insertHvxSubvectorReg(SDValue VecV, SDValue SubV, SDValue IdxV, 533 SDValue insertHvxSubvectorPred(SDValue VecV, SDValue SubV, SDValue IdxV,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelDAGToDAG.cpp | 2522 SDValue SubV = Node->getOperand(1); in Select() local 2523 SDLoc DL(SubV); in Select() 2525 MVT SubVecVT = SubV.getSimpleValueType(); in Select() 2577 DL, VT, SubV, RC); in Select() 2582 SDValue Insert = CurDAG->getTargetInsertSubreg(SubRegIdx, DL, VT, V, SubV); in Select()
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