| H A D | HexagonISelLoweringHVX.cpp | 1000 // Move the vector predicate SubV to a vector register, and scale it in createHvxPrefixPred()
1210 SDValue SubV = DAG.getNode(ISD::SUB, dl, MVT::i32, in insertHvxElementReg()
1212 SDValue TorV = DAG.getNode(HexagonISD::VROR, dl, VecTy, {InsV, SubV}); in insertHvxElementReg()
1359 HexagonTargetLowering::insertHvxSubvectorReg(SDValue VecV, SDValue SubV,
1362 MVT SubTy = ty(SubV); in insertHvxSubvectorReg()
1386 return DAG.getTargetInsertSubreg(SubIdx, dl, VecTy, VecV, SubV); in insertHvxSubvectorReg()
1389 // SubV as the high and as the low subregister, and select the right in insertHvxSubvectorReg()
1391 SDValue InLo = DAG.getNode(ISD::CONCAT_VECTORS, dl, VecTy, {SubV, V1}); in insertHvxSubvectorReg()
1392 SDValue InHi = DAG.getNode(ISD::CONCAT_VECTORS, dl, VecTy, {V0, SubV}); in insertHvxSubvectorReg()
1418 SDValue V = DAG.getBitcast(MVT::i32, SubV); in insertHvxSubvectorReg()
1211 SDValue SubV = DAG.getNode(ISD::SUB, dl, MVT::i32, insertHvxElementReg() local
1360 insertHvxSubvectorReg(SDValue VecV,SDValue SubV,SDValue IdxV,const SDLoc & dl,SelectionDAG & DAG) const insertHvxSubvectorReg() argument
1447 insertHvxSubvectorPred(SDValue VecV,SDValue SubV,SDValue IdxV,const SDLoc & dl,SelectionDAG & DAG) const insertHvxSubvectorPred() argument
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