Searched refs:SubSrc (Results 1 – 3 of 3) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEInstrInfo.cpp | 335 Register SubSrc = TRI->getSubReg(SrcReg, SubRegIdx[Idx]); in copyPhysSubRegs() local
336 assert(SubDest && SubSrc && "Bad sub-register"); in copyPhysSubRegs()
341 BuildMI(MBB, I, DL, MCID, SubDest).addReg(SubSrc).addImm(0); in copyPhysSubRegs()
346 BuildMI(MBB, I, DL, MCID, SubDest).addReg(VE::VM0).addReg(SubSrc); in copyPhysSubRegs()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MIRPrinter.cpp | 208 const auto &SubSrc = Sub.Src; in printMF() local
210 YamlMF.DebugValueSubstitutions.push_back({SubSrc.first, SubSrc.second, in printMF()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 6243 SDValue SubSrc = peekThroughOneUseBitcasts(Sub); in getFauxShuffleMask() local
6244 EVT SubSrcVT = SubSrc.getValueType(); in getFauxShuffleMask()
6249 if (SubSrc.getOpcode() == ISD::EXTRACT_SUBVECTOR && in getFauxShuffleMask()
6250 SubSrc.getOperand(0).getValueSizeInBits() == NumSizeInBits) { in getFauxShuffleMask()
6251 uint64_t ExtractIdx = SubSrc.getConstantOperandVal(1); in getFauxShuffleMask()
6252 SDValue SubSrcSrc = SubSrc.getOperand(0); in getFauxShuffleMask()
6274 if (!getTargetShuffleInputs(SubSrc, SubDemand, SubInputs, SubMask, DAG, in getFauxShuffleMask()
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