Searched refs:SubReg2 (Results 1 – 5 of 5) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrBuilder.h | 160 unsigned SubReg1, Register Reg2, bool isKill2, unsigned SubReg2) { in addRegReg() argument
163 .addReg(Reg2, getKillRegState(isKill2), SubReg2) in addRegReg()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetInstrInfo.cpp | 204 unsigned SubReg2 = MI.getOperand(Idx2).getSubReg(); in commuteInstructionImpl() local
241 SubReg0 = SubReg2; in commuteInstructionImpl()
267 CommutedMI->getOperand(Idx1).setSubReg(SubReg2); in commuteInstructionImpl()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelDAGToDAG.cpp | 1895 SDValue SubReg2 = CurDAG->getTargetConstant(ARM::ssub_2, dl, MVT::i32); in createQuadSRegsNode() local
1898 V2, SubReg2, V3, SubReg3 }; in createQuadSRegsNode()
1910 SDValue SubReg2 = CurDAG->getTargetConstant(ARM::dsub_2, dl, MVT::i32); in createQuadDRegsNode() local
1913 V2, SubReg2, V3, SubReg3 }; in createQuadDRegsNode()
1925 SDValue SubReg2 = CurDAG->getTargetConstant(ARM::qsub_2, dl, MVT::i32); in createQuadQRegsNode() local
1928 V2, SubReg2, V3, SubReg3 }; in createQuadQRegsNode()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 1160 unsigned SubReg2 = MI.getOperand(2).getSubReg(); in commuteInstructionImpl() local
1198 MI.getOperand(0).setSubReg(SubReg2); in commuteInstructionImpl()
1203 MI.getOperand(1).setSubReg(SubReg2); in commuteInstructionImpl()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 27513 unsigned SubReg1 = AArch64::sube64, SubReg2 = AArch64::subo64; in ReplaceCMP_SWAP_128Results() local
27515 std::swap(SubReg1, SubReg2); in ReplaceCMP_SWAP_128Results()
27518 SDValue Hi = DAG.getTargetExtractSubreg(SubReg2, SDLoc(N), MVT::i64, in ReplaceCMP_SWAP_128Results()
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