Searched refs:SubOp1 (Results 1 – 2 of 2) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Transforms/AggressiveInstCombine/ |
| H A D | AggressiveInstCombine.cpp | 329 Value *Root, *SubOp1; in tryToRecognizePopCount() local
332 if (match(AndOp0, m_Sub(m_Value(Root), m_Value(SubOp1))) && in tryToRecognizePopCount()
333 match(SubOp1, m_And(m_LShr(m_Specific(Root), m_SpecificInt(1)), in tryToRecognizePopCount()
345 return MaskedValueIsZero(cast<Instruction>(SubOp1)->getOperand(0), in tryToRecognizePopCount()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 47528 SDValue SubOp1 = DAG.getNode(ISD::XOR, DL, MaskVT, V, Mask); in combineLogicBlendIntoConditionalNegate() local
47542 std::swap(SubOp1, SubOp2); in combineLogicBlendIntoConditionalNegate()
47544 SDValue Res = DAG.getNode(ISD::SUB, DL, MaskVT, SubOp1, SubOp2); in combineLogicBlendIntoConditionalNegate()
|