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Searched refs:StoreWidth (Results 1 – 2 of 2) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp16637 static bool isStoreConditional(SDValue Intrin, unsigned &StoreWidth) { in isStoreConditional() argument
16640 StoreWidth = 8; in isStoreConditional()
16642 StoreWidth = 4; in isStoreConditional()
16644 StoreWidth = 2; in isStoreConditional()
16646 StoreWidth = 1; in isStoreConditional()
17372 unsigned StoreWidth = 0; in PerformDAGCombine() local
17374 isStoreConditional(LHS, StoreWidth)) { in PerformDAGCombine()
17388 DAG.getConstant(StoreWidth, dl, MVT::i32)}; in PerformDAGCombine()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DLegalizerHelper.cpp4212 unsigned StoreWidth = MemTy.getSizeInBits(); in lowerStore() local
4215 if (StoreWidth != StoreSizeInBits && !SrcTy.isVector()) { in lowerStore()
4227 auto ZextInReg = MIRBuilder.buildZExtInReg(SrcTy, SrcReg, StoreWidth); in lowerStore()