Searched refs:StartReg (Results 1 – 4 of 4) sorted by relevance
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | GCNNSAReassign.cpp | 86 unsigned StartReg) const; 88 bool canAssign(unsigned StartReg, unsigned NumRegs) const; 110 unsigned StartReg) const { in tryAssignRegisters() 118 if (LRM->checkInterference(*Intervals[N], MCRegister::from(StartReg + N))) in tryAssignRegisters() 122 LRM->assign(*Intervals[N], MCRegister::from(StartReg + N)); in tryAssignRegisters() 127 bool GCNNSAReassign::canAssign(unsigned StartReg, unsigned NumRegs) const { in canAssign() argument 129 unsigned Reg = StartReg + N; in canAssign()
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | MVETPAndVPTOptimisationsPass.cpp | 172 Register StartReg = LoopPhi->getOperand(2).getMBB() == Latch in findLoopComponents() local 175 LoopStart = LookThroughCOPY(MRI->getVRegDef(StartReg), MRI); in findLoopComponents() 358 Register StartReg = LoopStart->getOperand(0).getReg(); in MergeLoopEnd() local 384 !CheckUsers(StartReg, {LoopPhi}, MRI)) { in MergeLoopEnd() 395 MRI->constrainRegClass(StartReg, &ARM::GPRlrRegClass); in MergeLoopEnd() 400 LoopPhi->getOperand(3).setReg(StartReg); in MergeLoopEnd() 403 LoopPhi->getOperand(1).setReg(StartReg); in MergeLoopEnd()
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.h | 1096 unsigned StartReg = 0);
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H A D | RISCVISelLowering.cpp | 22152 unsigned StartReg) { in allocatePhysReg() 22153 assert((StartReg % LMul) == 0 && in allocatePhysReg() 22174 if (StartReg) in allocatePhysReg() 22175 AllocatedPhysRegs.push_back(VRArrays[(StartReg - 8) / LMul + i]); in allocatePhysReg() 22195 for (unsigned StartReg = 0; StartReg + TotalRegsNeeded <= NumArgVRs; in compute() 22196 StartReg += RegsNeeded) { in compute() 22197 uint32_t Map = ((1 << TotalRegsNeeded) - 1) << StartReg; in compute() 22199 allocatePhysReg(ArgInfo.NF, RegsNeeded, StartReg + 8); in compute() 22149 allocatePhysReg(unsigned NF,unsigned LMul,unsigned StartReg) allocatePhysReg() argument 22192 for (unsigned StartReg = 0; StartReg + TotalRegsNeeded <= NumArgVRs; compute() local
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