| /freebsd/contrib/llvm-project/llvm/lib/FuzzMutate/ |
| H A D | Operations.cpp | 101 auto buildOp = [](ArrayRef<Value *> Srcs, Instruction *Inst) { in selectDescriptor() argument
102 return SelectInst::Create(Srcs[0], Srcs[1], Srcs[2], "S", Inst); in selectDescriptor()
110 auto buildOp = [](ArrayRef<Value *> Srcs, Instruction *Inst) { in fnegDescriptor() argument
111 return UnaryOperator::Create(Instruction::FNeg, Srcs[0], "F", Inst); in fnegDescriptor()
118 auto buildOp = [Op](ArrayRef<Value *> Srcs, Instruction *Inst) { in binOpDescriptor() argument
119 return BinaryOperator::Create(Op, Srcs[0], Srcs[1], "B", Inst); in binOpDescriptor()
151 auto buildOp = [CmpOp, Pred](ArrayRef<Value *> Srcs, Instruction *Inst) { in cmpOpDescriptor() argument
152 return CmpInst::Create(CmpOp, Pred, Srcs[0], Srcs[1], "C", Inst); in cmpOpDescriptor()
166 auto buildSplitBlock = [](ArrayRef<Value *> Srcs, Instruction *Inst) { in splitBlockDescriptor() argument
177 BranchInst::Create(Block, Next, Srcs[0], Block->getTerminator()); in splitBlockDescriptor()
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| H A D | RandomIRBuilder.cpp | 79 RandomIRBuilder::findOrCreateGlobalVariable(Module *M, ArrayRef<Value *> Srcs, in findOrCreateGlobalVariable() argument
81 auto MatchesPred = [&Srcs, &Pred](GlobalVariable *GV) { in findOrCreateGlobalVariable()
84 return Pred.matches(Srcs, UndefValue::get(GV->getValueType())); in findOrCreateGlobalVariable()
98 TRS.sample(Pred.generate(Srcs, KnownTypes)); in findOrCreateGlobalVariable()
116 ArrayRef<Value *> Srcs, in findOrCreateSource() argument
119 auto MatchesPred = [&Srcs, &Pred](Value *V) { return Pred.matches(Srcs, V); }; in findOrCreateSource()
164 auto [GV, DidCreate] = findOrCreateGlobalVariable(M, Srcs, Pred); in findOrCreateSource()
175 if (Pred.matches(Srcs, LoadGV)) { in findOrCreateSource()
187 return newSource(BB, Insts, Srcs, Pred, allowConstant); in findOrCreateSource()
199 ArrayRef<Value *> Srcs, SourcePred Pred, in newSource() argument
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| H A D | IRMutator.cpp | 138 SmallVector<Value *, 2> Srcs; in mutate() local
139 Srcs.push_back(IB.findOrCreateSource(BB, InstsBefore)); in mutate()
143 auto OpDesc = chooseOperation(Srcs[0], IB); in mutate()
149 Srcs.push_back(IB.findOrCreateSource(BB, InstsBefore, Srcs, Pred)); in mutate()
151 if (Value *Op = OpDesc->BuilderFunc(Srcs, Insts[IP])) { in mutate()
390 auto BuilderFunc = [FTy, F, isRetVoid](ArrayRef<Value *> Srcs, in mutate()
393 CallInst *Call = CallInst::Create(FTy, F, Srcs, Name, Inst); in mutate()
411 SmallVector<Value *, 2> Srcs; in mutate() local
414 Srcs.push_back(IB.findOrCreateSource(BB, InstsBefore, Srcs, Pred)); in mutate()
417 if (Value *Op = BuilderFunc(Srcs, Insts[IP])) { in mutate()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/FuzzMutate/ |
| H A D | RandomIRBuilder.h | 57 findOrCreateGlobalVariable(Module *M, ArrayRef<Value *> Srcs,
77 ArrayRef<Value *> Srcs, fuzzerop::SourcePred Pred,
81 ArrayRef<Value *> Srcs, fuzzerop::SourcePred Pred,
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | VirtRegMap.cpp | 463 ArrayRef<MachineInstr *> Srcs, in expandCopyBundle()
465 for (const MachineInstr *Src : Srcs) in expandCopyBundle()
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| H A D | TwoAddressInstructionPass.cpp | 560 SmallVector<Register, 2> Srcs; in removeMapRegEntry() local
569 Srcs.push_back(SI.first); in removeMapRegEntry()
571 Srcs.push_back(SI.first); in removeMapRegEntry()
574 for (auto SrcReg : Srcs) in removeMapRegEntry()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600ControlFlowFinalizer.cpp | 334 const SmallVector<std::pair<MachineOperand *, int64_t>, 3> Srcs = in getLiteral() local
336 for (const auto &Src:Srcs) { in getLiteral()
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| H A D | R600InstrInfo.cpp | 413 const std::vector<std::pair<int, unsigned>> &Srcs = in isLegalUpTo() local
416 const std::pair<int, unsigned> &Src = Srcs[j]; in isLegalUpTo()
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| H A D | SIISelLowering.cpp | 13848 SmallVectorImpl<DotSrc> &Srcs = I == 0 ? Src0s : Src1s; in placeSources() local
13854 auto Match = llvm::find_if(Srcs, MatchesFirst); in placeSources()
13855 if (Match != Srcs.end()) { in placeSources()
13862 SmallVectorImpl<DotSrc> &Srcs = FirstGroup == 1 ? Src0s : Src1s; in placeSources() local
13867 auto Match = llvm::find_if(Srcs, MatchesSecond); in placeSources()
13868 if (Match != Srcs.end()) { in placeSources()
13871 Srcs.push_back({*BPP.second.Src, SecondMask, BPP.second.SrcOffset / 4}); in placeSources()
13895 SmallVectorImpl<DotSrc> &Srcs, bool IsSigned, in resolveSources() argument
13899 if (Srcs.size() == 1) { in resolveSources()
13900 auto Elt = Srcs.begin(); in resolveSources()
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| /freebsd/contrib/file/magic/Magdir/ |
| H A D | animation | 281 # https://github.com/nokiatech/heif/blob/d5e9a21c8ba8df712bdf643021dd9f6518134776/Srcs/reader/hevci…
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 15077 int Srcs[2] = {-1, -1}; in lowerShuffleAsLanePermuteAndRepeatedMask() local
15089 if (Srcs[0] < 0 || Srcs[0] == LaneSrc) in lowerShuffleAsLanePermuteAndRepeatedMask()
15091 else if (Srcs[1] < 0 || Srcs[1] == LaneSrc) in lowerShuffleAsLanePermuteAndRepeatedMask()
15096 Srcs[Src] = LaneSrc; in lowerShuffleAsLanePermuteAndRepeatedMask()
15101 if (Srcs[1] < 0) in lowerShuffleAsLanePermuteAndRepeatedMask()
15104 LaneSrcs[Lane][0] = Srcs[0]; in lowerShuffleAsLanePermuteAndRepeatedMask()
15105 LaneSrcs[Lane][1] = Srcs[1]; in lowerShuffleAsLanePermuteAndRepeatedMask()
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