Searched refs:SrcVT0 (Results 1 – 1 of 1) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 40650 EVT SrcVT0 = Src0.getValueType(); in canonicalizeLaneShuffleWithRepeatedOps() local
40653 if (!Src1.isUndef() && (SrcVT0 != SrcVT1 || SrcOpc0 != SrcOpc1)) in canonicalizeLaneShuffleWithRepeatedOps()
40661 DAG.getNode(X86ISD::VPERM2X128, DL, SrcVT0, LHS, RHS, V.getOperand(2)); in canonicalizeLaneShuffleWithRepeatedOps()
40662 Res = DAG.getNode(SrcOpc0, DL, SrcVT0, Res); in canonicalizeLaneShuffleWithRepeatedOps()
40667 if (SrcVT0 == MVT::v4f64) { in canonicalizeLaneShuffleWithRepeatedOps()
40680 SDValue Res = DAG.getNode(X86ISD::VPERM2X128, DL, SrcVT0, LHS, RHS, in canonicalizeLaneShuffleWithRepeatedOps()
40682 Res = DAG.getNode(SrcOpc0, DL, SrcVT0, Res, Src0.getOperand(1)); in canonicalizeLaneShuffleWithRepeatedOps()
56153 EVT SrcVT0 = Src0.getOperand(0).getValueType(); in combineConcatVectorOps() local
56155 unsigned NumSrcElts0 = SrcVT0.getVectorNumElements(); in combineConcatVectorOps()
56157 if (SrcVT0.is256BitVector() && SrcVT1.is256BitVector() && in combineConcatVectorOps()
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