| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetRegisterInfo.cpp | 421 unsigned SrcSubReg) { in shareSameRegisterFile() argument
426 if (DefRC == SrcRC && DefSubReg == SrcSubReg) in shareSameRegisterFile()
431 if (SrcSubReg && DefSubReg) { in shareSameRegisterFile()
432 return TRI.getCommonSuperRegClass(SrcRC, SrcSubReg, DefRC, DefSubReg, in shareSameRegisterFile()
438 if (!SrcSubReg) { in shareSameRegisterFile()
439 std::swap(DefSubReg, SrcSubReg); in shareSameRegisterFile()
444 if (SrcSubReg) in shareSameRegisterFile()
445 return TRI.getMatchingSuperRegClass(SrcRC, DefRC, SrcSubReg) != nullptr; in shareSameRegisterFile()
454 unsigned SrcSubReg) const { in shouldRewriteCopySrc()
456 return shareSameRegisterFile(*this, DefRC, DefSubReg, SrcRC, SrcSubReg); in shouldRewriteCopySrc()
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| H A D | PeepholeOptimizer.cpp | 530 unsigned SrcSubReg = MI.getOperand(1).getSubReg(); in getCopySrc() local
534 SrcPair = RegSubRegPair(SrcReg, SrcSubReg); in getCopySrc()
631 void addSource(Register SrcReg, unsigned SrcSubReg) { in addSource() argument
632 RegSrcs.push_back(RegSubRegPair(SrcReg, SrcSubReg)); in addSource()
635 void setSource(int Idx, Register SrcReg, unsigned SrcSubReg) { in setSource() argument
637 RegSrcs[Idx] = RegSubRegPair(SrcReg, SrcSubReg); in setSource()
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| H A D | TailDuplicator.cpp | 364 unsigned SrcSubReg = MI->getOperand(SrcOpIdx).getSubReg(); in processPHI() local
366 LocalVRMap.insert(std::make_pair(DefReg, RegSubRegPair(SrcReg, SrcSubReg))); in processPHI()
371 Copies.push_back(std::make_pair(NewDef, RegSubRegPair(SrcReg, SrcSubReg))); in processPHI()
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| H A D | PHIElimination.cpp | 546 unsigned SrcSubReg = MPhi->getOperand(i * 2 + 1).getSubReg(); in LowerPHINode() local
608 SrcReg, SrcSubReg, IncomingReg); in LowerPHINode()
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| H A D | RegisterCoalescer.cpp | 4102 unsigned SrcSubReg = 0, DstSubReg = 0; in applyTerminalRule() local
4103 if (!isMoveInstr(*TRI, &Copy, SrcReg, DstReg, SrcSubReg, DstSubReg)) in applyTerminalRule()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | GCNPreRAOptimizations.cpp | 133 Register SrcSubReg = I.getOperand(1).getSubReg(); in processReg() local
135 if (SrcSubReg != Def.getOperand(0).getSubReg()) in processReg()
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| H A D | SIInstrInfo.cpp | 771 Register SrcSubReg = RI.getSubReg(SrcReg, SubIdx); in expandSGPRCopy() local
772 assert(DestSubReg && SrcSubReg && "Failed to find subregs!"); in expandSGPRCopy()
777 bool AlignedSrc = ((SrcSubReg - AMDGPU::SGPR0) % 2) == 0; in expandSGPRCopy()
783 SrcSubReg = RI.getSubReg(SrcReg, SubIdx); in expandSGPRCopy()
784 assert(DestSubReg && SrcSubReg && "Failed to find subregs!"); in expandSGPRCopy()
790 .addReg(SrcSubReg) in expandSGPRCopy()
1128 Register SrcSubReg = RI.getSubReg(SrcReg, SubIdx); in copyPhysReg() local
1129 assert(DestSubReg && SrcSubReg && "Failed to find subregs!"); in copyPhysReg()
1137 indirectCopyToAGPR(*this, MBB, MI, DL, DestSubReg, SrcSubReg, UseKill, in copyPhysReg()
1143 .addReg(SrcSubReg) in copyPhysReg()
[all …]
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| H A D | SIInstrInfo.h | 1420 unsigned SrcSubReg,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseRegisterInfo.cpp | 968 unsigned SrcSubReg) const { in shouldRewriteCopySrc()
972 (SrcSubReg == ARM::ssub_0 || SrcSubReg == ARM::ssub_1)) in shouldRewriteCopySrc()
976 SrcRC, SrcSubReg); in shouldRewriteCopySrc()
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| H A D | ARMBaseRegisterInfo.h | 165 unsigned SrcSubReg) const override;
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetInstrInfo.h | 2157 unsigned SrcSubReg, in createPHISourceCopy() argument
2160 .addReg(Src, 0, SrcSubReg); in createPHISourceCopy()
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| H A D | TargetRegisterInfo.h | 687 unsigned SrcSubReg) const;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.cpp | 1254 unsigned SrcSubReg = MI.getOperand(1).getSubReg(); in convertToThreeAddressWithLEA() local
1266 .addReg(Src, getKillRegState(IsKill), SrcSubReg); in convertToThreeAddressWithLEA()
1432 unsigned SrcSubReg, SrcSubReg2; in convertToThreeAddress() local
1472 if (!classifyLEAReg(MI, Src, Opc, /*AllowSP=*/false, SrcReg, SrcSubReg, in convertToThreeAddress()
1481 .addReg(SrcReg, getKillRegState(isKill), SrcSubReg) in convertToThreeAddress()
1511 if (!classifyLEAReg(MI, Src, Opc, /*AllowSP=*/false, SrcReg, SrcSubReg, in convertToThreeAddress()
1537 if (!classifyLEAReg(MI, Src, Opc, /*AllowSP=*/false, SrcReg, SrcSubReg, in convertToThreeAddress()
1587 SrcSubReg = SrcSubReg2; in convertToThreeAddress()
1589 if (!classifyLEAReg(MI, Src, Opc, /*AllowSP=*/true, SrcReg, SrcSubReg, in convertToThreeAddress()
1601 addRegReg(MIB, SrcReg, isKill, SrcSubReg, SrcReg2, isKill2, SrcSubReg2); in convertToThreeAddress()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/LiveDebugValues/ |
| H A D | InstrRefBasedImpl.cpp | 1998 unsigned SrcSubReg = SRI.getSubReg(); in performCopy() local
2009 LocIdx SrcL = MTracker->lookupOrTrackRegister(SrcSubReg); in performCopy()
2013 ValueIDNum CpyValue = MTracker->readReg(SrcSubReg); in performCopy()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 10156 Register SrcSubReg = TRI->getSubReg(SrcReg, AArch64::sub_32); in describeORRLoadedValue() local
10157 return ParamLoadedValue(MachineOperand::CreateReg(SrcSubReg, false), Expr); in describeORRLoadedValue()
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