Searched refs:SrcSubIdx (Results 1 – 3 of 3) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | DetectDeadLanes.cpp | 77 unsigned SrcSubIdx = MO.getSubReg(); in isCrossCopy() local
93 SrcSubIdx = TRI.composeSubRegIndices(SubReg, SrcSubIdx); in isCrossCopy()
98 if (SrcSubIdx && DstSubIdx) in isCrossCopy()
99 return !TRI.getCommonSuperRegClass(SrcRC, SrcSubIdx, DstRC, DstSubIdx, PreA, in isCrossCopy()
101 if (SrcSubIdx) in isCrossCopy()
102 return !TRI.getMatchingSuperRegClass(SrcRC, DstRC, SrcSubIdx); in isCrossCopy()
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| H A D | RegisterCoalescer.cpp | 1682 unsigned SrcSubIdx = 0, DstSubIdx = 0; in eliminateUndefCopy() local
1683 if(!isMoveInstr(*TRI, CopyMI, SrcReg, DstReg, SrcSubIdx, DstSubIdx)) in eliminateUndefCopy()
1689 if (SrcSubIdx != 0 && SrcLI.hasSubRanges()) { in eliminateUndefCopy()
1690 LaneBitmask SrcMask = TRI->getSubRegIndexLaneMask(SrcSubIdx); in eliminateUndefCopy()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 5036 int SrcSubIdx = SrcIdx % ElemsPerVReg; in lowerShuffleViaVRegSplitting()
5046 OutMasks[DstVecIdx].second[DstSubIdx] = SrcSubIdx; in lowerShuffleViaVRegSplitting()
5035 int SrcSubIdx = SrcIdx % ElemsPerVReg; lowerShuffleViaVRegSplitting() local
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