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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonBitSimplify.cpp2247 unsigned SrcSR = 0; in genBitSplit() local
2307 SrcSR = (std::min(Pos, P) == 32) ? Hexagon::isub_hi : Hexagon::isub_lo; in genBitSplit()
2308 if (!validateReg({SrcR,SrcSR}, Hexagon::A4_bitspliti, 1)) in genBitSplit()
2318 if (Op1.getReg() != SrcR || Op1.getSubReg() != SrcSR) in genBitSplit()
2337 .addReg(SrcR, 0, SrcSR) in genBitSplit()