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Searched refs:SrcOpcode (Results 1 – 5 of 5) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86DomainReassignment.cpp76 unsigned SrcOpcode; member in __anond9661d290111::InstrConverterBase
79 InstrConverterBase(unsigned SrcOpcode) : SrcOpcode(SrcOpcode) {} in InstrConverterBase() argument
86 assert(MI->getOpcode() == SrcOpcode && in isLegal()
107 InstrIgnore(unsigned SrcOpcode) : InstrConverterBase(SrcOpcode) {} in InstrIgnore() argument
127 InstrReplacer(unsigned SrcOpcode, unsigned DstOpcode) in InstrReplacer() argument
128 : InstrConverterBase(SrcOpcode), DstOpcode(DstOpcode) {} in InstrReplacer()
168 InstrReplacerDstCOPY(unsigned SrcOpcode, unsigned DstOpcode) in InstrReplacerDstCOPY() argument
169 : InstrConverterBase(SrcOpcode), DstOpcode(DstOpcode) {} in InstrReplacerDstCOPY()
204 InstrCOPYReplacer(unsigned SrcOpcode, RegDomain DstDomain, unsigned DstOpcode) in InstrCOPYReplacer() argument
205 : InstrReplacer(SrcOpcode, DstOpcode), DstDomain(DstDomain) {} in InstrCOPYReplacer()
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H A DX86ISelLowering.cpp42019 unsigned SrcOpcode = N0.getOpcode(); in canonicalizeShuffleWithOp() local
42021 if (TLI.isBinOp(SrcOpcode) && IsSafeToMoveShuffle(N0, SrcOpcode)) { in canonicalizeShuffleWithOp()
42041 DAG.getNode(SrcOpcode, DL, OpVT, in canonicalizeShuffleWithOp()
42046 if (SrcOpcode == ISD::SINT_TO_FP && IsSafeToMoveShuffle(N0, SrcOpcode) && in canonicalizeShuffleWithOp()
42057 return DAG.getBitcast(ShuffleVT, DAG.getNode(SrcOpcode, DL, OpVT, Res)); in canonicalizeShuffleWithOp()
42081 unsigned SrcOpcode = N0.getOpcode(); in canonicalizeShuffleWithOp() local
42082 if (TLI.isBinOp(SrcOpcode) && N1.getOpcode() == SrcOpcode && in canonicalizeShuffleWithOp()
42084 IsSafeToMoveShuffle(N0, SrcOpcode) && in canonicalizeShuffleWithOp()
42085 IsSafeToMoveShuffle(N1, SrcOpcode)) { in canonicalizeShuffleWithOp()
42110 DAG.getNode(SrcOpcode, DL, OpVT, in canonicalizeShuffleWithOp()
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMLatencyMutations.cpp533 unsigned SrcOpcode = SrcMI->getOpcode(); in makeBundleAssumptions() local
543 if (SrcOpcode == ARM::BUNDLE && TII->isPredicated(*SrcMI) && in makeBundleAssumptions()
609 unsigned SrcOpcode = SrcMI->getOpcode(); in modifyBypasses() local
610 bool isNSWload = II->isNonSubwordLoad(SrcOpcode); in modifyBypasses()
654 if (II->isMultiply(SrcOpcode)) { in modifyBypasses()
668 (SrcOpcode == ARM::BUNDLE || in modifyBypasses()
691 if (II->isRev(SrcOpcode)) { in modifyBypasses()
859 unsigned SrcOpcode = SrcMI->getOpcode(); in modifyBypasses() local
860 bool isNSWload = II->isNonSubwordLoad(SrcOpcode); in modifyBypasses()
901 II->isMVEIntMACMatched(SrcOpcode, DstOpcode) && in modifyBypasses()
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCMIPeephole.cpp937 unsigned SrcOpcode = SrcMI->getOpcode(); in simplifyCode() local
940 if (SrcOpcode == PPC::LHZ || SrcOpcode == PPC::LHZX) { in simplifyCode()
948 bool SourceIsXForm = SrcOpcode == PPC::LHZX; in simplifyCode()
988 unsigned SrcOpcode = SrcMI->getOpcode(); in simplifyCode() local
991 if (SrcOpcode == PPC::LWZ || SrcOpcode == PPC::LWZX) { in simplifyCode()
1017 bool SourceIsXForm = SrcOpcode == PPC::LWZX; in simplifyCode()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp27407 unsigned SrcOpcode = N0.getOpcode(); in visitVECTOR_SHUFFLE() local
27408 if (TLI.isBinOp(SrcOpcode) && N->isOnlyUserOf(N0.getNode()) && in visitVECTOR_SHUFFLE()
27410 (SrcOpcode == N1.getOpcode() && N->isOnlyUserOf(N1.getNode())))) { in visitVECTOR_SHUFFLE()
27475 return DAG.getNode(SrcOpcode, DL, VT, LHS, RHS); in visitVECTOR_SHUFFLE()