| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCVSXCopy.cpp | 82 MachineOperand &SrcMO = MI.getOperand(1); in processBlock() local
85 !IsVSReg(SrcMO.getReg(), MRI)) { in processBlock()
90 assert((IsF8Reg(SrcMO.getReg(), MRI) || in processBlock()
91 IsVSSReg(SrcMO.getReg(), MRI) || in processBlock()
92 IsVSFReg(SrcMO.getReg(), MRI)) && in processBlock()
100 .add(SrcMO) in processBlock()
104 SrcMO.setReg(NewVReg); in processBlock()
106 IsVSReg(SrcMO.getReg(), MRI)) { in processBlock()
120 .add(SrcMO); in processBlock()
123 SrcMO.setReg(NewVReg); in processBlock()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86LowerTileCopy.cpp | 94 MachineOperand &SrcMO = MI.getOperand(1); in runOnMachineFunction() local
95 Register SrcReg = SrcMO.getReg(); in runOnMachineFunction()
140 .addReg(SrcReg, getKillRegState(SrcMO.isKill())); in runOnMachineFunction()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZPostRewrite.cpp | 242 MachineOperand &SrcMO = MI.getOperand(1); in selectMI() local
243 if (DstReg != SrcMO.getReg()) { in selectMI()
245 .addReg(SrcMO.getReg()); in selectMI()
246 SrcMO.setReg(DstReg); in selectMI()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMLatencyMutations.cpp | 562 auto SrcMO = *SrcInst.memoperands().begin(); in memoryRAWHazard() local
564 auto SrcVal = SrcMO->getValue(); in memoryRAWHazard()
566 auto SrcPseudoVal = SrcMO->getPseudoValue(); in memoryRAWHazard()
569 SrcMO->getOffset() == DstMO->getOffset()) { in memoryRAWHazard()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetInstrInfo.cpp | 883 MachineOperand &SrcMO = MI->getOperand(1); in lowerCopy() local
885 bool IdentityCopy = (SrcMO.getReg() == DstMO.getReg()); in lowerCopy()
886 if (IdentityCopy || SrcMO.isUndef()) { in lowerCopy()
889 if (SrcMO.isUndef() || MI->getNumOperands() > 2) { in lowerCopy()
901 SrcMO.getReg(), SrcMO.isKill(), in lowerCopy()
903 SrcMO.getReg().isPhysical() ? SrcMO.isRenamable() : false); in lowerCopy()
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| H A D | TwoAddressInstructionPass.cpp | 1526 MachineOperand &SrcMO = MI->getOperand(SrcIdx); in collectTiedOperands() local
1528 Register SrcReg = SrcMO.getReg(); in collectTiedOperands()
1534 assert(SrcReg && SrcMO.isUse() && "two address instruction invalid"); in collectTiedOperands()
1537 if (SrcMO.isUndef() && !DstMO.getSubReg()) { in collectTiedOperands()
1543 SrcMO.setReg(DstReg); in collectTiedOperands()
1544 SrcMO.setSubReg(0); in collectTiedOperands()
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| H A D | MachineSink.cpp | 1565 const MachineOperand *SrcMO = nullptr, *DstMO = nullptr; in attemptDebugCopyProp() local
1569 SrcMO = CopyOperands->Source; in attemptDebugCopyProp()
1576 if (Reg.isVirtual() != SrcMO->getReg().isVirtual()) in attemptDebugCopyProp()
1589 if (DbgMO.getSubReg() != SrcMO->getSubReg() || in attemptDebugCopyProp()
1600 DbgMO.setReg(SrcMO->getReg()); in attemptDebugCopyProp()
1601 DbgMO.setSubReg(SrcMO->getSubReg()); in attemptDebugCopyProp()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| H A D | AMDGPUMCCodeEmitter.cpp | 638 const MCOperand &SrcMO = MI.getOperand(SrcMOIdx); in getMachineOpValueT16() local
639 if (!SrcMO.isReg()) in getMachineOpValueT16()
641 auto SrcReg = SrcMO.getReg(); in getMachineOpValueT16()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 3118 MachineOperand &SrcMO = MI.getOperand(1); in widenScalar() local
3125 const APInt &SrcVal = SrcMO.getCImm()->getValue(); in widenScalar()
3130 SrcMO.setCImm(ConstantInt::get(Ctx, Val)); in widenScalar()
3139 MachineOperand &SrcMO = MI.getOperand(1); in widenScalar() local
3140 APInt Val = SrcMO.getFPImm()->getValueAPF().bitcastToAPInt(); in widenScalar()
3444 MachineOperand &SrcMO = MI.getOperand(1); in widenScalar() local
3446 const APInt &SrcVal = SrcMO.getCImm()->getValue(); in widenScalar()
3450 SrcMO.setCImm(ConstantInt::get(Ctx, Val)); in widenScalar()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 6239 const MachineOperand &SrcMO = MI.getOperand(1); in foldMemoryOperandImpl() local
6241 Register SrcReg = SrcMO.getReg(); in foldMemoryOperandImpl()
6249 if (DstMO.getSubReg() == 0 && SrcMO.getSubReg() == 0) { in foldMemoryOperandImpl()
6254 storeRegToStackSlot(MBB, InsertPt, SrcReg, SrcMO.isKill(), FrameIndex, in foldMemoryOperandImpl()
6273 assert(SrcMO.getSubReg() == 0 && in foldMemoryOperandImpl()
6275 storeRegToStackSlot(MBB, InsertPt, AArch64::XZR, SrcMO.isKill(), in foldMemoryOperandImpl()
6290 if (IsFill && SrcMO.getSubReg() == 0 && DstMO.isUndef()) { in foldMemoryOperandImpl()
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