Searched refs:SrcLane (Results 1 – 4 of 4) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PostLegalizerLowering.cpp | 500 int SrcLane = ShuffleMask[DstLane]; in matchINS() local
501 if (SrcLane >= NumElts) { in matchINS()
503 SrcLane -= NumElts; in matchINS()
506 MatchInfo = std::make_tuple(DstVec, DstLane, SrcVec, SrcLane); in matchINS()
517 int DstLane, SrcLane; in applyINS() local
518 std::tie(DstVec, DstLane, SrcVec, SrcLane) = MatchInfo; in applyINS()
519 auto SrcCst = Builder.buildConstant(LLT::scalar(64), SrcLane); in applyINS()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 5081 unsigned DstLane = 0, SrcLane = 0; in setExecutionDomain() local
5084 DSrc = getCorrespondingDRegAndLane(TRI, SrcReg, SrcLane); in setExecutionDomain()
5087 if (!getImplicitSPRUseForDPRUse(TRI, MI, DSrc, SrcLane, ImplicitSReg)) in setExecutionDomain()
5099 .addImm(SrcLane) in setExecutionDomain()
5130 MCRegister CurReg = SrcLane == 1 && DstLane == 1 ? DSrc : DDst; in setExecutionDomain()
5134 CurReg = SrcLane == 0 && DstLane == 0 ? DSrc : DDst; in setExecutionDomain()
5140 if (SrcLane == DstLane) in setExecutionDomain()
5148 CurReg = SrcLane == 1 && DstLane == 0 ? DSrc : DDst; in setExecutionDomain()
5152 CurReg = SrcLane == 0 && DstLane == 1 ? DSrc : DDst; in setExecutionDomain()
5158 if (SrcLane != DstLane) in setExecutionDomain()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 9942 int SrcLane = -1; in isMultiLaneShuffleMask() local
9948 if (SrcLane >= 0 && SrcLane != Lane) in isMultiLaneShuffleMask()
9950 SrcLane = Lane; in isMultiLaneShuffleMask()
16105 int SrcLane = -1; in lowerShuffleAsRepeatedMaskAndLanePermute() local
16112 if ((0 <= SrcLane) && (SrcLane != Lane)) in lowerShuffleAsRepeatedMaskAndLanePermute()
16114 SrcLane = Lane; in lowerShuffleAsRepeatedMaskAndLanePermute()
16120 if (SrcLane < 0) in lowerShuffleAsRepeatedMaskAndLanePermute()
16151 int SrcSubLane = (SrcLane * SubLaneScale) + SubLane; in lowerShuffleAsRepeatedMaskAndLanePermute()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 14103 int SrcLane = ShuffleMask[Anomaly]; in LowerVECTOR_SHUFFLE() local
14104 if (SrcLane >= NumInputElements) { in LowerVECTOR_SHUFFLE()
14106 SrcLane -= NumElts; in LowerVECTOR_SHUFFLE()
14108 SDValue SrcLaneV = DAG.getConstant(SrcLane, DL, MVT::i64); in LowerVECTOR_SHUFFLE()
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