Searched refs:Src2Regs (Results 1 – 3 of 3) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.h | 258 ArrayRef<Register> Src2Regs, LLT NarrowTy);
|
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 6504 ArrayRef<Register> Src2Regs, in multiplyRegisters() argument
6512 B.buildMul(NarrowTy, Src1Regs[DstIdx], Src2Regs[DstIdx]).getReg(0); in multiplyRegisters()
6523 B.buildMul(NarrowTy, Src1Regs[DstIdx - i], Src2Regs[i]); in multiplyRegisters()
6530 B.buildUMulH(NarrowTy, Src1Regs[DstIdx - 1 - i], Src2Regs[i]); in multiplyRegisters()
6618 SmallVector<Register, 2> Src1Regs, Src2Regs, Src1Left, Src2Left, DstRegs; in narrowScalarAddSub() local
6621 extractParts(Src2, RegTy, NarrowTy, DummyTy, Src2Regs, Src2Left, MIRBuilder, in narrowScalarAddSub()
6626 Src2Regs.append(Src2Left); in narrowScalarAddSub()
6641 {Src1Regs[i], Src2Regs[i]}); in narrowScalarAddSub()
6644 {Src1Regs[i], Src2Regs[i], CarryIn}); in narrowScalarAddSub()
6647 {Src1Regs[i], Src2Regs[i], CarryIn}); in narrowScalarAddSub()
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPURegisterBankInfo.cpp | 2363 SmallVector<Register, 2> Src2Regs(OpdMapper.getVRegs(3)); in applyMappingImpl() local
2367 assert(Src1Regs.empty() && Src2Regs.empty()); in applyMappingImpl()
2377 if (Src2Regs.empty()) in applyMappingImpl()
2378 split64BitValueForMapping(B, Src2Regs, HalfTy, MI.getOperand(3).getReg()); in applyMappingImpl()
2380 setRegsToType(MRI, Src2Regs, HalfTy); in applyMappingImpl()
2385 B.buildSelect(DefRegs[0], CondRegs[0], Src1Regs[0], Src2Regs[0], Flags); in applyMappingImpl()
2386 B.buildSelect(DefRegs[1], CondRegs[0], Src1Regs[1], Src2Regs[1], Flags); in applyMappingImpl()
|