Searched refs:Src2RC (Results 1 – 2 of 2) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.td | 1711 RegisterOperand Src2RC, int NumSrcArgs,
1759 Src2Mod:$src2_modifiers, Src2RC:$src2,
1764 Src2Mod:$src2_modifiers, Src2RC:$src2,
1768 Src2Mod:$src2_modifiers, Src2RC:$src2))),
1773 Src2RC:$src2, Clamp0:$clamp, omod0:$omod),
1777 Src2RC:$src2, Clamp0:$clamp),
1780 Src2RC:$src2))))
1784 (ins Src0RC:$src0, Src1RC:$src1, Src2RC:$src2, Clamp0:$clamp),
1785 (ins Src0RC:$src0, Src1RC:$src1, Src2RC:$src2))
1790 RegisterOperand Src2RC, int NumSrcArgs,
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| H A D | SIISelLowering.cpp | 5157 const TargetRegisterClass *Src2RC = MRI.getRegClass(Src2.getReg()); in EmitInstrWithCustomInserter() local
5158 unsigned WaveSize = TRI->getRegSizeInBits(*Src2RC); in EmitInstrWithCustomInserter()
5168 TRI->getSubRegisterClass(Src2RC, AMDGPU::sub0); in EmitInstrWithCustomInserter()
5170 MII, MRI, Src2, Src2RC, AMDGPU::sub0, SubRC); in EmitInstrWithCustomInserter()
5172 MII, MRI, Src2, Src2RC, AMDGPU::sub1, SubRC); in EmitInstrWithCustomInserter()
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