/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVISelDAGToDAG.h | 132 bool selectVSplat(SDValue N, SDValue &SplatVal); 133 bool selectVSplatSimm5(SDValue N, SDValue &SplatVal); 134 bool selectVSplatUimm(SDValue N, unsigned Bits, SDValue &SplatVal); 138 bool selectVSplatSimm5Plus1(SDValue N, SDValue &SplatVal); 139 bool selectVSplatSimm5Plus1NonZero(SDValue N, SDValue &SplatVal); 142 bool selectLow8BitsVSplat(SDValue N, SDValue &SplatVal);
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H A D | RISCVISelDAGToDAG.cpp | 3321 bool RISCVDAGToDAGISel::selectVSplat(SDValue N, SDValue &SplatVal) { in selectVSplat() argument 3326 SplatVal = Splat.getOperand(1); in selectVSplat() 3330 static bool selectVSplatImmHelper(SDValue N, SDValue &SplatVal, in selectVSplatImmHelper() argument 3356 SplatVal = DAG.getTargetConstant(SplatImm, SDLoc(N), Subtarget.getXLenVT()); in selectVSplatImmHelper() 3360 bool RISCVDAGToDAGISel::selectVSplatSimm5(SDValue N, SDValue &SplatVal) { in selectVSplatSimm5() argument 3361 return selectVSplatImmHelper(N, SplatVal, *CurDAG, *Subtarget, in selectVSplatSimm5() 3365 bool RISCVDAGToDAGISel::selectVSplatSimm5Plus1(SDValue N, SDValue &SplatVal) { in selectVSplatSimm5Plus1() argument 3367 N, SplatVal, *CurDAG, *Subtarget, in selectVSplatSimm5Plus1() 3372 SDValue &SplatVal) { in selectVSplatSimm5Plus1NonZero() argument 3374 N, SplatVal, *CurDAG, *Subtarget, [](int64_t Imm) { in selectVSplatSimm5Plus1NonZero() [all …]
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H A D | RISCVISelLowering.cpp | 3471 static SDValue matchSplatAsGather(SDValue SplatVal, MVT VT, const SDLoc &DL, in matchSplatAsGather() 3474 if (SplatVal.getOpcode() != ISD::EXTRACT_VECTOR_ELT) in matchSplatAsGather() 3476 SDValue Vec = SplatVal.getOperand(0); in matchSplatAsGather() 3482 SDValue Idx = SplatVal.getOperand(1); in matchSplatAsGather() 8059 SDValue SplatVal = Op.getOperand(0); in lowerVectorMaskSplat() 8070 SplatVal = DAG.getNode(ISD::AND, DL, SplatVal.getValueType(), SplatVal, in lowerVectorMaskSplat() 8071 DAG.getConstant(1, DL, SplatVal.getValueType())); in lowerVectorMaskSplat() 8072 SDValue LHS = DAG.getSplatVector(InterVT, DL, SplatVal); in lowerVectorMaskSplat() 3470 matchSplatAsGather(SDValue SplatVal,MVT VT,const SDLoc & DL,SelectionDAG & DAG,const RISCVSubtarget & Subtarget) matchSplatAsGather() argument 8057 SDValue SplatVal = Op.getOperand(0); lowerVectorMaskSplat() local 16534 __anon765c18b71b02(SDValue V, unsigned Opc, unsigned OpcVL, APInt &SplatVal) combineTruncToVnclip() argument [all...] |
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
H A D | LoongArchISelDAGToDAG.cpp | 353 bool LoongArchDAGToDAGISel::selectVSplatImm(SDValue N, SDValue &SplatVal) { in selectVSplatImm() argument 363 SplatVal = CurDAG->getTargetConstant(ImmValue.getSExtValue(), SDLoc(N), in selectVSplatImm() 368 SplatVal = CurDAG->getTargetConstant(ImmValue.getZExtValue(), SDLoc(N), in selectVSplatImm()
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H A D | LoongArchISelDAGToDAG.h | 61 bool selectVSplatImm(SDValue N, SDValue &SplatVal);
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/ |
H A D | RISCVLegalizerInfo.cpp | 721 Register SplatVal = MI.getOperand(1).getReg(); in legalizeSplatVector() local 730 buildSplatSplitS64WithVL(Dst, MIB.buildUndef(VecTy), SplatVal, VL, MIB, in legalizeSplatVector() 737 MachineInstr &SplatValMI = *MRI.getVRegDef(SplatVal); in legalizeSplatVector() 755 auto ZExtSplatVal = MIB.buildZExt(InterEltTy, SplatVal); in legalizeSplatVector()
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/freebsd/contrib/llvm-project/llvm/lib/IR/ |
H A D | Constants.cpp | 118 if (const auto *SplatVal = getSplatValue()) in isAllOnesValue() local 119 return SplatVal->isAllOnesValue(); in isAllOnesValue() 135 if (const auto *SplatVal = getSplatValue()) in isOneValue() local 136 return SplatVal->isOneValue(); in isOneValue() 162 if (const auto *SplatVal = getSplatValue()) in isNotOneValue() local 163 return SplatVal->isNotOneValue(); in isNotOneValue() 180 if (const auto *SplatVal = getSplatValue()) in isMinSignedValue() local 181 return SplatVal->isMinSignedValue(); in isMinSignedValue() 207 if (const auto *SplatVal = getSplatValue()) in isNotMinSignedValue() local 208 return SplatVal->isNotMinSignedValue(); in isNotMinSignedValue() [all …]
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H A D | ConstantFold.cpp | 402 if (Constant *SplatVal = Val->getSplatValue()) in ConstantFoldExtractElementInstruction() local 403 return SplatVal; in ConstantFoldExtractElementInstruction()
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineVectorOps.cpp | 1231 Value *SplatVal = InsElt.getOperand(1); in foldInsSequenceIntoSplat() local 1240 if (!Idx || CurrIE->getOperand(1) != SplatVal) in foldInsSequenceIntoSplat() 1273 FirstIE = InsertElementInst::Create(PoisonVec, SplatVal, Zero, "", in foldInsSequenceIntoSplat()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 10731 SDValue SplatVal = DAG.getSExtOrTrunc(CCVal, DL, SplatValVT); in LowerSELECT() local 10732 SDValue SplatPred = DAG.getNode(ISD::SPLAT_VECTOR, DL, PredVT, SplatVal); in LowerSELECT() 13330 SDValue SplatVal = DAG.getAnyExtOrTrunc(Op.getOperand(0), DL, MVT::i64); in LowerSPLAT_VECTOR() local 13331 SplatVal = DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, MVT::i64, SplatVal, in LowerSPLAT_VECTOR() 13339 Zero, SplatVal), in LowerSPLAT_VECTOR() 13341 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, DL, VT, ID, Zero, SplatVal); in LowerSPLAT_VECTOR() 14652 static bool isPow2Splat(SDValue Op, uint64_t &SplatVal, bool &Negated) { in isPow2Splat() argument 14659 !isAllConstantBuildVector(Op, SplatVal)) in isPow2Splat() 14666 SplatVal = Op->getConstantOperandVal(0); in isPow2Splat() 14668 SplatVal = (int32_t)SplatVal; in isPow2Splat() [all …]
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H A D | AArch64TargetTransformInfo.cpp | 1220 if (auto *SplatVal = getSplatValue(Vec)) in instCombineSVELast() local 1221 return IC.replaceInstUsesWith(II, SplatVal); in instCombineSVELast()
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.h | 948 bool isConstantSplat(SDValue Op, APInt &SplatVal,
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H A D | X86ISelDAGToDAG.cpp | 977 APInt SplatVal; in PreprocessISelDAG() local 978 if (X86::isConstantSplat(N->getOperand(1), SplatVal) && in PreprocessISelDAG() 979 SplatVal.isOne()) { in PreprocessISelDAG()
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H A D | X86ISelLowering.cpp | 5063 bool isConstantSplat(SDValue Op, APInt &SplatVal, bool AllowPartialUndefs) { in isConstantSplat() argument 5080 SplatVal = EltBits[SplatIndex]; in isConstantSplat() 32697 APInt SplatVal; in ReplaceNodeResults() local 32698 if (ISD::isConstantSplatVector(N->getOperand(1).getNode(), SplatVal)) { in ReplaceNodeResults() 32704 SDValue N1 = DAG.getConstant(SplatVal, dl, ResVT); in ReplaceNodeResults() 49426 APInt SplatVal; in combineAndMaskToShift() local 49427 if (!X86::isConstantSplat(Op1, SplatVal, false) || !SplatVal.isMask()) in combineAndMaskToShift() 49442 unsigned ShiftVal = SplatVal.countr_one(); in combineAndMaskToShift()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAG.cpp | 145 bool ISD::isConstantSplatVector(const SDNode *N, APInt &SplatVal) { in isConstantSplatVector() argument 150 SplatVal = Op0->getAPIntValue().trunc(EltSize); in isConstantSplatVector() 154 SplatVal = Op0->getValueAPF().bitcastToAPInt().trunc(EltSize); in isConstantSplatVector() 172 return BV->isConstantSplat(SplatVal, SplatUndef, SplatBitSize, HasUndefs, in isConstantSplatVector() 186 APInt SplatVal; in isConstantSplatVectorAllOnes() local 187 return isConstantSplatVector(N, SplatVal) && SplatVal.isAllOnes(); in isConstantSplatVectorAllOnes() 235 APInt SplatVal; in isConstantSplatVectorAllZeros() local 236 return isConstantSplatVector(N, SplatVal) && SplatVal.isZero(); in isConstantSplatVectorAllZeros()
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H A D | DAGCombiner.cpp | 11838 if (SDValue SplatVal = DAG.getSplatValue(Index); in refineUniformBase() local 11839 SplatVal && !isNullConstant(SplatVal) && in refineUniformBase() 11840 SplatVal.getValueType() == VT) { in refineUniformBase() 11841 BasePtr = DAG.getNode(ISD::ADD, DL, VT, BasePtr, SplatVal); in refineUniformBase() 11849 if (SDValue SplatVal = DAG.getSplatValue(Index.getOperand(0)); in refineUniformBase() local 11850 SplatVal && SplatVal.getValueType() == VT) { in refineUniformBase() 11851 BasePtr = DAG.getNode(ISD::ADD, DL, VT, BasePtr, SplatVal); in refineUniformBase() 11855 if (SDValue SplatVal = DAG.getSplatValue(Index.getOperand(1)); in refineUniformBase() local 11856 SplatVal && SplatVal.getValueType() == VT) { in refineUniformBase() 11857 BasePtr = DAG.getNode(ISD::ADD, DL, VT, BasePtr, SplatVal); in refineUniformBase() [all …]
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H A D | LegalizeDAG.cpp | 2052 SDValue SplatVal = Node->getOperand(0); in ExpandSPLAT_VECTOR() local 2054 return DAG.getSplatBuildVector(VT, DL, SplatVal); in ExpandSPLAT_VECTOR()
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/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyISelLowering.cpp | 2590 auto IsZeroSplat = [](SDValue SplatVal) { in performVectorTruncZeroCombine() argument 2591 auto *Splat = dyn_cast<BuildVectorSDNode>(SplatVal.getNode()); in performVectorTruncZeroCombine()
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/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 7183 SDValue SplatVal = Op1->getOperand(0); in combineSTORE() local 7184 if (auto *C = dyn_cast<ConstantSDNode>(SplatVal)) in combineSTORE() 7185 FindReplicatedImm(C, SplatVal.getValueType().getStoreSize()); in combineSTORE() 7187 FindReplicatedReg(SplatVal); in combineSTORE() 7200 SDValue SplatVal = DAG.getSplatVector(SplatVT, SDLoc(SN), Word); in combineSTORE() local 7201 return DAG.getStore(SN->getChain(), SDLoc(SN), SplatVal, in combineSTORE()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | IRTranslator.cpp | 3184 auto SplatVal = MIRBuilder.buildExtractVectorElementConstant( in translateShuffleVector() local 3187 MIRBuilder.buildSplatVector(getOrCreateVReg(U), SplatVal); in translateShuffleVector()
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H A D | LegalizerHelper.cpp | 8736 APInt SplatVal = APInt::getSplat(NumBits, Scalar); in getMemsetValue() local 8737 return MIB.buildConstant(Ty, SplatVal).getReg(0); in getMemsetValue()
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 10102 unsigned SplatVal = APSplatValue.getZExtValue(); in lowerToXXSPLTI32DX() local 10104 SplatVal |= (SplatVal << SplatBitSize); in lowerToXXSPLTI32DX() 10108 Index, DAG.getTargetConstant(SplatVal, DL, MVT::i32)); in lowerToXXSPLTI32DX() 15682 SDValue SplatVal = in combineVectorShuffle() local 15684 TheSplat = DAG.getSplatBuildVector(TheSplat.getValueType(), dl, SplatVal); in combineVectorShuffle()
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