| /freebsd/contrib/llvm-project/llvm/include/llvm/Transforms/Coroutines/ |
| H A D | SpillUtils.h | 33 void collectSpillsFromArgs(SpillInfo &Spills, Function &F,
36 SpillInfo &Spills, SmallVector<AllocaInfo, 8> &Allocas,
41 void collectSpillsFromDbgInfo(SpillInfo &Spills, Function &F,
48 coro::SpillInfo &Spills,
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Coroutines/ |
| H A D | SpillUtils.cpp | 450 void collectSpillsFromArgs(SpillInfo &Spills, Function &F, in collectSpillsFromArgs() argument
456 Spills[&A].push_back(cast<Instruction>(U)); in collectSpillsFromArgs()
460 SpillInfo &Spills, SmallVector<AllocaInfo, 8> &Allocas, in collectSpillsAndAllocasFromInsts() argument
489 Spills[Alloc].push_back(cast<Instruction>(U)); in collectSpillsAndAllocasFromInsts()
509 Spills[&I].push_back(cast<Instruction>(U)); in collectSpillsAndAllocasFromInsts()
514 void collectSpillsFromDbgInfo(SpillInfo &Spills, Function &F, in collectSpillsFromDbgInfo() argument
520 for (auto &Iter : Spills) { in collectSpillsFromDbgInfo()
527 Spills[V].push_back(DVI); in collectSpillsFromDbgInfo()
531 Spills[V].push_back(DVR->Marker->MarkedInstr); in collectSpillsFromDbgInfo()
539 coro::SpillInfo &Spills, in sinkSpillUsesAfterCoroBegin() argument
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| H A D | CoroFrame.cpp | 53 coro::SpillInfo &Spills; member
58 FrameDataInfo(coro::SpillInfo &Spills, in FrameDataInfo()
60 : Spills(Spills), Allocas(Allocas) {} in FrameDataInfo()
64 for (const auto &P : Spills) in getAllDefs()
139 static void dumpSpills(StringRef Title, const coro::SpillInfo &Spills) { in dumpSpills() argument
141 for (const auto &E : Spills) { in dumpSpills()
329 for (auto &S : Spills) in updateLayoutIndex()
912 for (auto &S : FrameData.Spills) { in buildFrameType()
1056 for (auto const &E : FrameData.Spills) { in insertSpills()
2062 coro::SpillInfo Spills; in buildCoroutineFrame() local
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| H A D | MaterializationUtils.cpp | 263 coro::SpillInfo Spills; in doRematerializations() local
273 Spills[&I].push_back(cast<Instruction>(U)); in doRematerializations()
292 for (auto &E : Spills) { in doRematerializations()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | LiveInterval.cpp | 1165 for (const LiveRange::Segment &Spill : Spills) in print()
1205 assert(Spills.empty() && "Leftover spilled segments"); in add()
1246 if (!Spills.empty() && coalescable(Spills.back(), Seg)) { in add()
1247 Seg.start = Spills.back().start; in add()
1248 Seg.end = std::max(Spills.back().end, Seg.end); in add()
1249 Spills.pop_back(); in add()
1269 Spills.push_back(Seg); in add()
1277 size_t NumMoved = std::min(Spills.size(), GapSize); in mergeSpills()
1280 LiveRange::iterator SpillSrc = Spills.end(); in mergeSpills()
1293 assert(NumMoved == size_t(Spills.end() - SpillSrc)); in mergeSpills()
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| H A D | RegAllocGreedy.h | 405 unsigned Spills = 0; member
415 return !(Reloads || FoldedReloads || Spills || FoldedSpills || in isEmpty()
423 Spills += other.Spills; in add()
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| H A D | InlineSpiller.cpp | 114 SmallPtrSet<MachineInstr *, 16> &Spills,
119 MachineBasicBlock *Root, SmallPtrSet<MachineInstr *, 16> &Spills,
126 SmallPtrSet<MachineInstr *, 16> &Spills,
1403 SmallPtrSet<MachineInstr *, 16> &Spills, in rmRedundantSpills() argument
1409 for (auto *const CurrentSpill : Spills) { in rmRedundantSpills()
1425 Spills.erase(SpillToRm); in rmRedundantSpills()
1435 MachineBasicBlock *Root, SmallPtrSet<MachineInstr *, 16> &Spills, in getVisitOrders() argument
1458 for (auto *const Spill : Spills) { in getVisitOrders()
1520 SmallPtrSet<MachineInstr *, 16> &Spills, in runHoistSpills() argument
1534 rmRedundantSpills(Spills, SpillsToRm, SpillBBToSpill); in runHoistSpills()
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| H A D | RegAllocGreedy.cpp | 2659 if (Spills) { in report()
2660 R << NV("NumSpills", Spills) << " spills "; in report()
2731 ++Stats.Spills; in computeStats()
2772 Stats.SpillsCost = RelFreq * Stats.Spills; in computeStats()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | LiveInterval.h | 952 SmallVector<LiveRange::Segment, 16> Spills; variable
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstructions.td | 933 // that switch the VGPR indexing mode. Spills to accvgprs could be effected by
1093 // Spills a block of 32 VGPRs. M0 will contain a mask describing which
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