Searched refs:SpillReg (Results 1 – 4 of 4) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | MachineFrameInfo.h | 68 void setDstReg(Register SpillReg) { in setDstReg() argument
69 DstReg = SpillReg; in setDstReg()
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| H A D | MachineInstrBuilder.h | 539 Register SpillReg);
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIFrameLowering.cpp | 139 Register SpillReg, int FI, Register FrameReg, in buildPrologSpill() argument
149 LiveUnits.addReg(SpillReg); in buildPrologSpill()
150 bool IsKill = !MBB.isLiveIn(SpillReg); in buildPrologSpill()
151 TRI.buildSpillLoadStore(MBB, I, DL, Opc, FI, SpillReg, IsKill, FrameReg, in buildPrologSpill()
154 LiveUnits.removeReg(SpillReg); in buildPrologSpill()
163 const DebugLoc &DL, Register SpillReg, int FI, in buildEpilogRestore() argument
173 TRI.buildSpillLoadStore(MBB, I, DL, Opc, FI, SpillReg, false, FrameReg, in buildEpilogRestore()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineInstr.cpp | 2322 Register SpillReg) { in computeExprForSpill() argument
2323 assert(MI.hasDebugOperandForReg(SpillReg) && "Spill Reg is not used in MI."); in computeExprForSpill()
2325 for (const MachineOperand &Op : MI.getDebugOperandsForReg(SpillReg)) in computeExprForSpill()
2333 int FrameIndex, Register SpillReg) { in buildDbgValueForSpill() argument
2336 const DIExpression *Expr = computeExprForSpill(Orig, SpillReg); in buildDbgValueForSpill()
2346 if (Op.isReg() && Op.getReg() == SpillReg) in buildDbgValueForSpill()
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