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Searched refs:SpillAlignment (Results 1 – 7 of 7) sorted by relevance

/freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/
H A DInfoByHwMode.cpp121 SpillAlignment = R->getValueAsInt("SpillAlignment"); in RegSizeInfo()
125 return std::tie(RegSize, SpillSize, SpillAlignment) < in operator <()
126 std::tie(I.RegSize, I.SpillSize, I.SpillAlignment); in operator <()
130 return RegSize <= I.RegSize && SpillAlignment && in isSubClassOf()
131 I.SpillAlignment % SpillAlignment == 0 && SpillSize <= I.SpillSize; in isSubClassOf()
135 OS << "[R=" << RegSize << ",S=" << SpillSize << ",A=" << SpillAlignment in writeToStream()
168 return std::tie(A0.SpillSize, A0.SpillAlignment) > in hasStricterSpillThan()
169 std::tie(B0.SpillSize, B0.SpillAlignment); in hasStricterSpillThan()
H A DInfoByHwMode.h184 unsigned SpillAlignment; member
190 return std::tie(RegSize, SpillSize, SpillAlignment) ==
191 std::tie(I.RegSize, I.SpillSize, I.SpillAlignment);
H A DCodeGenRegisters.cpp818 RI.SpillAlignment = R->getValueAsInt("Alignment"); in CodeGenRegisterClass()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetRegisterInfo.h243 unsigned RegSize, SpillSize, SpillAlignment; member
310 return Align(getRegClassInfo(RC).SpillAlignment / 8); in getSpillAlign()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Coroutines/
H A DCoroFrame.cpp1815 auto SpillAlignment = Align(FrameData.getAlign(Def)); in insertSpills() local
1869 Builder.CreateAlignedStore(Value, G, SpillAlignment); in insertSpills()
1871 Builder.CreateAlignedStore(Def, G, SpillAlignment); in insertSpills()
1892 SpillAlignment, E.first->getName() + Twine(".reload")); in insertSpills()
/freebsd/contrib/llvm-project/llvm/utils/TableGen/
H A DRegisterInfoEmitter.cpp1287 << RI.SpillAlignment; in runTargetDesc()
1838 OS << ' ' << getModeName(M) << ':' << RC.RSI.get(M).SpillAlignment; in debugDump()
/freebsd/contrib/llvm-project/llvm/include/llvm/Target/
H A DTarget.td76 int SpillAlignment = SA; // Spill slot alignment in bits.