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Searched refs:SmallVT (Results 1 – 7 of 7) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp627 EVT SmallVT = EVT::getIntegerVT(*DAG.getContext(), SmallVTBits); in ShrinkDemandedOp() local
628 if (isTruncateFree(VT, SmallVT) && isZExtFree(SmallVT, VT)) { in ShrinkDemandedOp()
636 Op.getOpcode(), dl, SmallVT, in ShrinkDemandedOp()
637 DAG.getNode(ISD::TRUNCATE, dl, SmallVT, Op.getOperand(0)), in ShrinkDemandedOp()
638 DAG.getNode(ISD::TRUNCATE, dl, SmallVT, Op.getOperand(1)), Flags); in ShrinkDemandedOp()
1887 EVT SmallVT = EVT::getIntegerVT(*TLO.DAG.getContext(), SmallVTBits); in SimplifyDemandedBits() local
1888 if (isNarrowingProfitable(Op.getNode(), VT, SmallVT) && in SimplifyDemandedBits()
1889 isTypeDesirableForOp(ISD::SHL, SmallVT) && in SimplifyDemandedBits()
1890 isTruncateFree(VT, SmallVT) && isZExtFree(SmallVT, VT) && in SimplifyDemandedBits()
1891 (!TLO.LegalOperations() || isOperationLegal(ISD::SHL, SmallVT))) { in SimplifyDemandedBits()
[all …]
H A DLegalizeIntegerTypes.cpp1841 EVT SmallVT = LHS.getValueType(); in PromoteIntRes_XMULO() local
1863 unsigned Shift = SmallVT.getScalarSizeInBits(); in PromoteIntRes_XMULO()
1873 Mul, DAG.getValueType(SmallVT)); in PromoteIntRes_XMULO()
H A DDAGCombiner.cpp11097 EVT SmallVT = N0.getOperand(0).getValueType(); in visitSRL() local
11098 unsigned BitSize = SmallVT.getScalarSizeInBits(); in visitSRL()
11102 if (!LegalTypes || TLI.isTypeDesirableForOp(ISD::SRL, SmallVT)) { in visitSRL()
11106 DAG.getNode(ISD::SRL, DL0, SmallVT, N0.getOperand(0), in visitSRL()
11107 DAG.getShiftAmountConstant(ShiftAmt, SmallVT, DL0)); in visitSRL()
25997 EVT SmallVT = V.getOperand(1).getValueType(); in visitEXTRACT_SUBVECTOR() local
25998 if (NVT.bitsEq(SmallVT)) { in visitEXTRACT_SUBVECTOR()
26005 if (InsIdx * SmallVT.getScalarSizeInBits() == in visitEXTRACT_SUBVECTOR()
H A DSelectionDAGBuilder.cpp10558 EVT SmallVT = EVT::getIntegerVT(*DAG.getContext(), Bits); in lowerRangeToAssertZExt() local
10563 DAG.getValueType(SmallVT)); in lowerRangeToAssertZExt()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp5419 EVT SmallVT = EVT::getIntegerVT(*DAG.getContext(), WidthVal); in PerformDAGCombine() local
5428 DAG.getValueType(SmallVT)); in PerformDAGCombine()
5431 return DAG.getZeroExtendInReg(BitsFrom, DL, SmallVT); in PerformDAGCombine()
H A DSIISelLowering.cpp8986 EVT SmallVT = EVT::getIntegerVT(*DAG.getContext(), llvm::bit_width(MaxID)); in lowerWorkitemID() local
8988 DAG.getValueType(SmallVT)); in lowerWorkitemID()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp1140 for (auto SmallVT : SmallerVTs) { in RISCVTargetLowering() local
1141 setTruncStoreAction(VT, SmallVT, Expand); in RISCVTargetLowering()
1142 setLoadExtAction(ISD::EXTLOAD, VT, SmallVT, Expand); in RISCVTargetLowering()