Searched refs:SkipSrc (Results 1 – 4 of 4) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | GCNVOPDUtils.cpp | 155 bool SkipSrc = ST.getGeneration() >= AMDGPUSubtarget::GFX12 && in checkVOPDRegConstraints() local
160 if (InstInfo.hasInvalidOperand(getVRegIdx, *TRI, SkipSrc, AllowSameVGPR, in checkVOPDRegConstraints()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/ |
| H A D | AMDGPUBaseInfo.h | 918 const MCRegisterInfo &MRI, bool SkipSrc = false,
920 return getInvalidCompOperandIndex(GetRegIdx, MRI, SkipSrc, AllowSameVGPR,
935 const MCRegisterInfo &MRI, bool SkipSrc = false,
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| H A D | AMDGPUBaseInfo.cpp | 864 const MCRegisterInfo &MRI, bool SkipSrc, bool AllowSameVGPR, in getInvalidCompOperandIndex() argument
900 if (SkipSrc && CompOprIdx >= Component::DST_NUM) in getInvalidCompOperandIndex()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 3956 bool SkipSrc = Opcode == AMDGPU::V_DUAL_MOV_B32_e32_X_MOV_B32_e32_gfx12 || in checkVOPDRegBankConstraints() local
3986 getVRegIdx, *TRI, SkipSrc, AllowSameVGPR, AsVOPD3); in checkVOPDRegBankConstraints()
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