Searched refs:SignExt (Results 1 – 5 of 5) sorted by relevance
| /freebsd/contrib/llvm-project/lldb/source/Plugins/Instruction/RISCV/ |
| H A D | EmulateInstructionRISCV.cpp | 57 constexpr int32_t SignExt(uint32_t imm) { return int32_t(imm); } in SignExt() function
222 return rs1 + uint64_t(SignExt(inst.imm)); in LoadStoreAddr()
681 bool operator()(LUI inst) { return inst.rd.Write(m_emu, SignExt(inst.imm)); } in operator ()()
686 SignExt(inst.imm) + pc); in operator ()()
694 m_emu.WritePC(SignExt(inst.imm) + pc); in operator ()()
703 m_emu.WritePC((SignExt(inst.imm) + rs1) & in operator ()()
715 return m_emu.WritePC(SignExt(inst.imm) + pc); in operator ()()
742 m_emu, rs1 + int64_t(SignExt(inst.imm))); in operator ()()
750 m_emu, rs1 < int64_t(SignExt(inst.imm))); in operator ()()
758 m_emu, rs1 < uint64_t(SignExt(inst.imm))); in operator ()()
[all …]
|
| /freebsd/contrib/llvm-project/clang/include/clang/CodeGen/ |
| H A D | CGFunctionInfo.h | 118 bool SignExt : 1; // isExtend() variable
140 SignExt(false) {}
330 return SignExt; in isSignExt()
334 SignExt = SExt; in setSignExt()
|
| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
| H A D | SimplifyIndVar.cpp | 1326 auto GuessNonIVOperand = [&](bool SignExt) { in cloneArithmeticIVUser() argument
1330 auto GetExtend = [this, SignExt](const SCEV *S, Type *Ty) { in cloneArithmeticIVUser()
1331 if (SignExt) in cloneArithmeticIVUser()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelDAGToDAG.cpp | 631 bool SignExt = false; in tryShrinkShlLogicImm() local
634 SignExt = true; in tryShrinkShlLogicImm()
658 if (SignExt && ShAmt >= 32) in tryShrinkShlLogicImm()
670 unsigned ShOpc = SignExt ? RISCV::SLLIW : RISCV::SLLI; in tryShrinkShlLogicImm()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 24511 SDValue SignExt = Curr; in LowerEXTEND_VECTOR_INREG() local
24532 SignExt = DAG.getNode(X86ISD::VSRAI, dl, DestVT, Curr, in LowerEXTEND_VECTOR_INREG()
24540 SignExt = DAG.getVectorShuffle(MVT::v4i32, dl, SignExt, Sign, {0, 4, 1, 5}); in LowerEXTEND_VECTOR_INREG()
24541 SignExt = DAG.getBitcast(VT, SignExt); in LowerEXTEND_VECTOR_INREG()
24544 return SignExt; in LowerEXTEND_VECTOR_INREG()
|