Searched refs:SignBitMask (Results 1 – 8 of 8) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| H A D | PPCXCOFFObjectWriter.cpp | 22 static constexpr uint8_t SignBitMask = 0x80; member in __anond9b4bd870111::PPCXCOFFObjectWriter 50 const uint8_t EncodedSignednessIndicator = IsPCRel ? SignBitMask : 0u; in getRelocTypeAndSignSize()
|
| /freebsd/contrib/llvm-project/llvm/include/llvm/ADT/ |
| H A D | Bitfields.h | 110 static constexpr Unsigned SignBitMask = Unsigned(1) << (Bits - 1); // 00100000 member 148 if (StorageValue >= T(BP::SignBitMask))
|
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 8213 auto SignBitMask = MIRBuilder.buildConstant( in lowerFCopySign() local 8222 And1 = MIRBuilder.buildAnd(Src1Ty, Src1, SignBitMask).getReg(0); in lowerFCopySign() 8227 And1 = MIRBuilder.buildAnd(Src0Ty, Shift, SignBitMask).getReg(0); in lowerFCopySign() 8232 And1 = MIRBuilder.buildAnd(Src0Ty, Trunc, SignBitMask).getReg(0); in lowerFCopySign()
|
| /freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineAndOrXor.cpp | 847 APInt &SignBitMask) -> bool { in foldSignedTruncationCheck() argument 855 SignBitMask = *I01; in foldSignedTruncationCheck()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 2416 const unsigned SignBitMask = 0x80000000; in LowerFROUND32() local 2418 DAG.getConstant(SignBitMask, SL, MVT::i32)); in LowerFROUND32()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 2478 const SDValue SignBitMask = DAG.getConstant(UINT32_C(1) << 31, SL, MVT::i32); in LowerFTRUNC() local 2479 SDValue SignBit = DAG.getNode(ISD::AND, SL, MVT::i32, Hi, SignBitMask); in LowerFTRUNC()
|
| H A D | AMDGPULegalizerInfo.cpp | 2581 const auto SignBitMask = B.buildConstant(S32, UINT32_C(1) << 31); in legalizeIntrinsicTrunc() local 2582 auto SignBit = B.buildAnd(S32, Hi, SignBitMask); in legalizeIntrinsicTrunc()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 30755 SDValue SignBitMask = DAG.getNode(LogicalOpc, dl, VT, SplatHighBit, Amt); in LowerShift() local 30757 DAG.getNode(ISD::XOR, dl, VT, Masked, SignBitMask); in LowerShift() 30759 DAG.getNode(ISD::SUB, dl, VT, FlippedSignBit, SignBitMask); in LowerShift()
|