| /freebsd/contrib/llvm-project/llvm/include/llvm/Analysis/ |
| H A D | ValueTracking.h | 268 std::optional<bool> SignBit; member
271 return KnownFPClasses == Other.KnownFPClasses && SignBit == Other.SignBit;
282 return KnownFPClasses == fcAllFlags && !SignBit; in isUnknown()
382 if (SignBit != RHS.SignBit)
383 SignBit = std::nullopt;
389 if (isKnownNever(fcNan) && !SignBit) { in knownNot()
391 SignBit = false; in knownNot()
393 SignBit = true; in knownNot()
399 if (SignBit) in fneg()
400 SignBit = !*SignBit; in fneg()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/DebugInfo/DWARF/ |
| H A D | DWARFExpression.h | 49 SignBit = 0x80, enumerator
50 SignedSize1 = SignBit | Size1,
51 SignedSize2 = SignBit | Size2,
52 SignedSize4 = SignBit | Size4,
53 SignedSize8 = SignBit | Size8,
54 SignedSizeLEB = SignBit | SizeLEB,
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeFloatTypes.cpp | 383 SDValue SignBit = DAG.getNode( in SoftenFloatRes_FCOPYSIGN() local
387 SignBit = DAG.getNode(ISD::AND, dl, RVT, RHS, SignBit); in SoftenFloatRes_FCOPYSIGN()
392 SignBit = in SoftenFloatRes_FCOPYSIGN()
393 DAG.getNode(ISD::SRL, dl, RVT, SignBit, in SoftenFloatRes_FCOPYSIGN()
395 TLI.getShiftAmountTy(SignBit.getValueType(), in SoftenFloatRes_FCOPYSIGN()
397 SignBit = DAG.getNode(ISD::TRUNCATE, dl, LVT, SignBit); in SoftenFloatRes_FCOPYSIGN()
399 SignBit = DAG.getNode(ISD::ANY_EXTEND, dl, LVT, SignBit); in SoftenFloatRes_FCOPYSIGN()
400 SignBit = in SoftenFloatRes_FCOPYSIGN()
401 DAG.getNode(ISD::SHL, dl, LVT, SignBit, in SoftenFloatRes_FCOPYSIGN()
403 TLI.getShiftAmountTy(SignBit.getValueType(), in SoftenFloatRes_FCOPYSIGN()
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| H A D | LegalizeDAG.cpp | 73 uint8_t SignBit; member
1577 State.SignBit = NumBits - 1; in getSignAsIntValue()
1613 State.SignBit = 7; in getSignAsIntValue()
1642 SDValue SignBit = DAG.getNode(ISD::AND, DL, IntVT, SignAsInt.IntValue, in ExpandFCOPYSIGN() local
1651 SDValue Cond = DAG.getSetCC(DL, getSetCCResultType(IntVT), SignBit, in ExpandFCOPYSIGN()
1665 int ShiftAmount = SignAsInt.SignBit - MagAsInt.SignBit; in ExpandFCOPYSIGN()
1667 if (SignBit.getScalarValueSizeInBits() < in ExpandFCOPYSIGN()
1669 SignBit = DAG.getNode(ISD::ZERO_EXTEND, DL, MagVT, SignBit); in ExpandFCOPYSIGN()
1674 SignBit = DAG.getNode(ISD::SRL, DL, ShiftVT, SignBit, ShiftCnst); in ExpandFCOPYSIGN()
1677 SignBit = DAG.getNode(ISD::SHL, DL, ShiftVT, SignBit, ShiftCnst); in ExpandFCOPYSIGN()
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| H A D | TargetLowering.cpp | 8642 APInt SignBit = APInt::getSignMask(BitSize); in expandIS_FPCLASS() local
8655 SDValue SignBitV = DAG.getConstant(SignBit, DL, IntVT); in expandIS_FPCLASS()
11252 SDValue SignBit = in expandRoundInexactToOdd() local
11299 SignBit = DAG.getNode(ISD::SRL, dl, WideIntVT, SignBit, ShiftCnst); in expandRoundInexactToOdd()
11300 SignBit = DAG.getNode(ISD::TRUNCATE, dl, ResultIntVT, SignBit); in expandRoundInexactToOdd()
11301 Op = DAG.getNode(ISD::OR, dl, ResultIntVT, Op, SignBit); in expandRoundInexactToOdd()
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| H A D | DAGCombiner.cpp | 15479 SDValue SignBit = DAG.getConstant( in visitBITCAST() local
15483 FlipBit = SignBit; in visitBITCAST()
15492 FlipBit = DAG.getNode(ISD::AND, SDLoc(N0), MVT::i64, Hi, SignBit); in visitBITCAST()
15500 APInt SignBit = APInt::getSignMask(VT.getSizeInBits()); in visitBITCAST() local
15503 NewConv, DAG.getConstant(SignBit, DL, VT)); in visitBITCAST()
15506 NewConv, DAG.getConstant(~SignBit, DL, VT)); in visitBITCAST()
15548 APInt SignBit = APInt::getSignMask(VT.getSizeInBits() / 2); in visitBITCAST() local
15562 DAG.getConstant(SignBit, SDLoc(XorResult64), MVT::i64)); in visitBITCAST()
15569 APInt SignBit = APInt::getSignMask(VT.getSizeInBits()); in visitBITCAST() local
15571 X, DAG.getConstant(SignBit, SDLoc(X), VT)); in visitBITCAST()
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| /freebsd/contrib/llvm-project/clang/lib/AST/Interp/ |
| H A D | Integral.h | 155 const ReprT SignBit = ReprT(1) << (TruncBits - 1);
157 return Integral((V & BitMask) | (Signed && (V & SignBit) ? ExtMask : 0));
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| /freebsd/contrib/llvm-project/llvm/lib/DebugInfo/DWARF/ |
| H A D | DWARFExpression.cpp | 155 unsigned Signed = Size & Operation::SignBit; in extract()
157 switch (Size & ~Operation::SignBit) { in extract()
321 unsigned Signed = Size & Operation::SignBit; in print()
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| /freebsd/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | ValueTracking.cpp | 1197 if (Result.SignBit) { in computeKnownBitsFromOperator()
1198 if (*Result.SignBit) in computeKnownBitsFromOperator()
4895 Known.SignBit = CFP->isNegative(); in computeKnownFPClass()
4901 Known.SignBit = false; in computeKnownFPClass()
4907 Known.SignBit = false; in computeKnownFPClass()
4946 Known.SignBit = SignBitAllOne; in computeKnownFPClass()
4973 if (!Known.SignBit && AssumedClasses.SignBit) { in computeKnownFPClass()
4974 if (*AssumedClasses.SignBit) in computeKnownFPClass()
5202 if (KnownLHS.SignBit && KnownRHS.SignBit && in computeKnownFPClass()
5203 *KnownLHS.SignBit == *KnownRHS.SignBit) { in computeKnownFPClass()
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| H A D | InstructionSimplify.cpp | 5810 if (Known.SignBit == false) in simplifyFMAFMul()
5813 if (Known.SignBit == true) in simplifyFMAFMul()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPURegisterBankInfo.cpp | 1515 auto SignBit = B.buildShl(S64, ShiftOffset, ExtShift); in applyMappingBFE() local
1517 B.buildAShr(S64, SignBit, ExtShift); in applyMappingBFE()
1519 B.buildLShr(S64, SignBit, ExtShift); in applyMappingBFE()
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| H A D | AMDGPULegalizerInfo.cpp | 2532 auto SignBit = B.buildAnd(S32, Hi, SignBitMask); in legalizeIntrinsicTrunc() local
2539 auto SignBit64 = B.buildMergeLikeInstr(S64, {Zero32, SignBit}); in legalizeIntrinsicTrunc()
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| H A D | AMDGPUISelLowering.cpp | 2422 SDValue SignBit = DAG.getNode(ISD::AND, SL, MVT::i32, Hi, SignBitMask); in LowerFTRUNC() local
2425 SDValue SignBit64 = DAG.getBuildVector(MVT::v2i32, SL, {Zero, SignBit}); in LowerFTRUNC()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineCalls.cpp | 1920 APInt SignBit = APInt::getSignMask(Ty->getScalarSizeInBits()); in visitCallInst() local
1921 return SelectInst::Create(X, ConstantInt::get(Ty, SignBit), in visitCallInst()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 6987 auto SignBit = MIRBuilder.buildConstant(S64, 63); in lowerSITOFP() local
6988 auto S = MIRBuilder.buildAShr(S64, L, SignBit); in lowerSITOFP()
8322 APInt SignBit = APInt::getSignMask(BitSize); in lowerISFPCLASS() local
8331 auto SignBitC = MIRBuilder.buildConstant(IntTy, SignBit); in lowerISFPCLASS()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 16715 APInt SignBit = APInt::getSignMask(32); in PerformDAGCombine()
16718 DAG.getConstant(SignBit, DL, MVT::i32)); in PerformDAGCombine()
16723 DAG.getConstant(~SignBit, DL, MVT::i32)); in PerformDAGCombine()
16780 APInt SignBit = APInt::getSignMask(FPBits).sext(VT.getSizeInBits()); in PerformDAGCombine()
16783 DAG.getConstant(SignBit, DL, VT)); in PerformDAGCombine()
16787 DAG.getConstant(~SignBit, DL, VT)); in PerformDAGCombine()
16712 APInt SignBit = APInt::getSignMask(32); PerformDAGCombine() local
16777 APInt SignBit = APInt::getSignMask(FPBits).sext(VT.getSizeInBits()); PerformDAGCombine() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 4801 SDValue SignBit; in LowerINT_TO_FP() local
4803 SignBit = DAG.getNode(ISD::AND, DL, MVT::i64, SrcVal, in LowerINT_TO_FP()
4823 if (SignBit) { in LowerINT_TO_FP()
4824 RoundedBits = DAG.getNode(ISD::OR, DL, MVT::i64, RoundedBits, SignBit); in LowerINT_TO_FP()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 21938 SDValue SignBit = DAG.getNode(X86ISD::FAND, dl, LogicVT, Sign, SignMask); in LowerFCOPYSIGN() local
21956 SDValue Or = DAG.getNode(X86ISD::FOR, dl, LogicVT, MagBits, SignBit); in LowerFCOPYSIGN()
53172 APInt SignBit = APInt::getSignMask(VT.getScalarSizeInBits()); in combineAVG() local
53173 SDValue SignMask = DAG.getConstant(SignBit, DL, VT); in combineAVG()
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