Searched refs:SignAsInt (Results 1 – 2 of 2) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeDAG.cpp | 1703 FloatSignAsInt SignAsInt; in ExpandFCOPYSIGN() local
1704 getSignAsIntValue(SignAsInt, DL, Sign); in ExpandFCOPYSIGN()
1706 EVT IntVT = SignAsInt.IntValue.getValueType(); in ExpandFCOPYSIGN()
1707 SDValue SignMask = DAG.getConstant(SignAsInt.SignMask, DL, IntVT); in ExpandFCOPYSIGN()
1708 SDValue SignBit = DAG.getNode(ISD::AND, DL, IntVT, SignAsInt.IntValue, in ExpandFCOPYSIGN()
1732 int ShiftAmount = SignAsInt.SignBit - MagAsInt.SignBit; in ExpandFCOPYSIGN()
1761 FloatSignAsInt SignAsInt; in ExpandFNEG() local
1762 getSignAsIntValue(SignAsInt, DL, Node->getOperand(0)); in ExpandFNEG()
1763 EVT IntVT = SignAsInt.IntValue.getValueType(); in ExpandFNEG()
1766 SDValue SignMask = DAG.getConstant(SignAsInt.SignMask, DL, IntVT); in ExpandFNEG()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 6905 SDValue SignAsInt = [&]() { in lowerFCOPYSIGN() local
6927 SignAsInt = DAG.getNode(ShiftAmount > 0 ? ISD::SRL : ISD::SHL, DL, XLenVT, in lowerFCOPYSIGN()
6928 SignAsInt, in lowerFCOPYSIGN()
6935 SDValue SignBit = DAG.getNode(ISD::AND, DL, XLenVT, SignAsInt, SignMask); in lowerFCOPYSIGN()
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