Searched refs:Shl0 (Results 1 – 3 of 3) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineMulDivRem.cpp | 1225 auto *Shl0 = cast<OverflowingBinaryOperator>(Op0); in foldIDivShl() local
1232 ((Shl0->hasNoUnsignedWrap() && Shl1->hasNoUnsignedWrap()) || in foldIDivShl()
1233 (Shl0->hasNoUnsignedWrap() && Shl0->hasNoSignedWrap() && in foldIDivShl()
1239 if (IsSigned && Shl0->hasNoSignedWrap() && Shl1->hasNoSignedWrap() && in foldIDivShl()
1248 auto *Shl0 = cast<OverflowingBinaryOperator>(Op0); in foldIDivShl() local
1251 if (IsSigned ? (Shl0->hasNoSignedWrap() && Shl1->hasNoSignedWrap()) in foldIDivShl()
1252 : (Shl0->hasNoUnsignedWrap() && Shl1->hasNoUnsignedWrap())) { in foldIDivShl()
1260 IsSigned ? (Shl0->hasNoUnsignedWrap() || Shl1->hasNoUnsignedWrap()) in foldIDivShl()
1261 : Shl0->hasNoSignedWrap()); in foldIDivShl()
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| H A D | InstCombineShifts.cpp | 1629 auto *Shl0 = cast<BinaryOperator>(Op0); in visitLShr() local
1630 bool HasNUW = Shl0->hasNoUnsignedWrap() && Shl1->hasNoUnsignedWrap(); in visitLShr()
1631 bool HasNSW = Shl0->hasNoSignedWrap() && Shl1->hasNoSignedWrap(); in visitLShr()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 4028 SDValue Shl0 = Sub1.getOperand(0); in foldRemainderIdiom() local
4031 if ((Shl0.getOpcode() == ISD::SDIVREM || in foldRemainderIdiom()
4032 Shl0.getOpcode() == ISD::UDIVREM) && in foldRemainderIdiom()
4033 Shl0.getResNo() == 0 && Shl0.getOperand(0) == Sub0) { in foldRemainderIdiom()
4035 SDValue Divisor = Shl0.getOperand(1); in foldRemainderIdiom()
4044 return SDValue(Shl0.getNode(), 1); in foldRemainderIdiom()
10542 SDValue Shl0 = DAG.getNode(ISD::SHL, SDLoc(N0), VT, N0.getOperand(0), N1); in visitSHL() local
10543 AddToWorklist(Shl0.getNode()); in visitSHL()
10548 return DAG.getNode(N0.getOpcode(), DL, VT, Shl0, Shl1, Flags); in visitSHL()
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