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Searched refs:ShiftValue (Results 1 – 9 of 9) sorted by relevance

/freebsd/contrib/llvm-project/llvm/include/llvm/Support/
H A DAlignment.h41 uint8_t ShiftValue = 0; /// The log2 of the required alignment.
79 ShiftValue = Log2_64(Value); in Align()
80 assert(ShiftValue < 64 && "Broken invariant"); in Align()
85 uint64_t value() const { return uint64_t(1) << ShiftValue; } in value()
89 assert(ShiftValue != 0 && "Undefined operation"); in previous()
91 Out.ShiftValue = ShiftValue - 1; in previous()
107 constexpr Align(LogValue CA) : ShiftValue(CA.Log) {} in Align()
208 inline unsigned Log2(Align A) { return A.ShiftValue; } in Log2()
217 inline unsigned encode(MaybeAlign A) { return A ? A->ShiftValue + 1 : 0; } in encode()
224 Out.ShiftValue = Value - 1; in decodeMaybeAlign()
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/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/MCTargetDesc/
H A DSystemZMCAsmBackend.cpp174 unsigned ShiftValue = (Size * 8) - 8; in applyFixup() local
176 Data[Offset + I] |= uint8_t(Value >> ShiftValue); in applyFixup()
177 ShiftValue -= 8; in applyFixup()
H A DSystemZMCCodeEmitter.cpp145 unsigned ShiftValue = (Size * 8) - 8; in encodeInstruction() local
147 CB.push_back(uint8_t(Bits >> ShiftValue)); in encodeInstruction()
148 ShiftValue -= 8; in encodeInstruction()
/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/MCTargetDesc/
H A DXtensaMCCodeEmitter.cpp178 unsigned ShiftValue = 0; in encodeInstruction() local
180 CB.push_back(char(Bits >> ShiftValue)); in encodeInstruction()
181 ShiftValue += 8; in encodeInstruction()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/
H A DMipsAsmParser.cpp4946 uint64_t ShiftValue = ImmValue; in expandRotationImm() local
4948 ShiftValue = MaxShift - ImmValue; in expandRotationImm()
4949 TOut.emitRRI(Mips::ROTR, DReg, SReg, ShiftValue, Inst.getLoc(), STI); in expandRotationImm()
5088 uint64_t ShiftValue = ImmValue % 32; in expandDRotationImm() local
5090 ShiftValue = (32 - ImmValue % 32) % 32; in expandDRotationImm()
5092 TOut.emitRRI(FinalOpcode, DReg, SReg, ShiftValue, Inst.getLoc(), STI); in expandDRotationImm()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp15754 unsigned &ShiftValue, in canLowerSRLToRoundingShiftForVT() argument
15767 ShiftValue = ShiftOp1->getZExtValue(); in canLowerSRLToRoundingShiftForVT()
15768 if (ShiftValue < 1 || ShiftValue > ResVT.getScalarSizeInBits()) in canLowerSRLToRoundingShiftForVT()
15779 if (ShiftValue > ExtraBits && !Add->getFlags().hasNoUnsignedWrap()) in canLowerSRLToRoundingShiftForVT()
15787 if (AddValue != 1ULL << (ShiftValue - 1)) in canLowerSRLToRoundingShiftForVT()
15823 unsigned ShiftValue; in LowerVectorSRA_SRL_SHL() local
15824 if (canLowerSRLToRoundingShiftForVT(Op, VT, DAG, ShiftValue, RShOperand)) in LowerVectorSRA_SRL_SHL()
15827 DAG.getTargetConstant(ShiftValue, DL, MVT::i32)); in LowerVectorSRA_SRL_SHL()
23102 SDValue ShiftValue = Op0.getOperand(1); in tryCombineExtendRShTrunc() local
23103 if (RshOpc != Op1.getOpcode() || ShiftValue != Op1.getOperand(1)) in tryCombineExtendRShTrunc()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp10813 SDValue ShiftValue; in visitSRA() local
10815 ShiftValue = DAG.getBuildVector(ShiftVT, DL, ShiftValues); in visitSRA()
10820 ShiftValue = DAG.getSplatVector(ShiftVT, DL, ShiftValues[0]); in visitSRA()
10822 ShiftValue = ShiftValues[0]; in visitSRA()
10823 return DAG.getNode(ISD::SRA, DL, VT, N0.getOperand(0), ShiftValue); in visitSRA()
/freebsd/contrib/llvm-project/llvm/lib/Analysis/
H A DScalarEvolution.cpp12459 Value *Shiftee, *ShiftValue; in isImpliedCondOperandsViaShift() local
12463 m_LShr(m_Value(Shiftee), m_Value(ShiftValue)))) { in isImpliedCondOperandsViaShift()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp28685 SDValue ShiftValue = in LowerSET_ROUNDING() local
28693 ShiftValue); in LowerSET_ROUNDING()