Searched refs:ShiftSrc (Results 1 – 4 of 4) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUInstructionSelector.cpp | 4365 Register ShiftSrc; in isLshrHalf() local
4368 m_GLShr(m_Reg(ShiftSrc), m_GCst(ShiftAmt)))) { in isLshrHalf()
4382 Register ShiftSrc; in isShlHalf() local
4385 m_GShl(m_Reg(ShiftSrc), m_GCst(ShiftAmt)))) { in isShlHalf()
5115 Register ShiftSrc; in selectSWMMACIndex8() local
5117 if (mi_match(Src, *MRI, m_GLShr(m_Reg(ShiftSrc), m_GCst(ShiftAmt))) && in selectSWMMACIndex8()
5118 MRI->getType(ShiftSrc).getSizeInBits() == 32 && in selectSWMMACIndex8()
5121 Src = ShiftSrc; in selectSWMMACIndex8()
5137 Register ShiftSrc; in selectSWMMACIndex16() local
5139 if (mi_match(Src, *MRI, m_GLShr(m_Reg(ShiftSrc), m_GCst(ShiftAmt))) && in selectSWMMACIndex16()
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| H A D | AMDGPUISelDAGToDAG.cpp | 3610 const llvm::SDValue &ShiftSrc = In.getOperand(0); in SelectSWMMACIndex8() local
3612 if (ShiftSrc.getValueType().getSizeInBits() == 32 && ShiftAmt && in SelectSWMMACIndex8()
3615 Src = ShiftSrc; in SelectSWMMACIndex8()
3629 const llvm::SDValue &ShiftSrc = In.getOperand(0); in SelectSWMMACIndex16() local
3631 if (ShiftSrc.getValueType().getSizeInBits() == 32 && ShiftAmt && in SelectSWMMACIndex16()
3634 Src = ShiftSrc; in SelectSWMMACIndex16()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 2726 Register ShiftSrc = ShiftMI->getOperand(1).getReg(); in applyCombineTruncOfShift() local
2727 ShiftSrc = Builder.buildTrunc(NewShiftTy, ShiftSrc).getReg(0); in applyCombineTruncOfShift()
2731 .buildInstr(ShiftMI->getOpcode(), {NewShiftTy}, {ShiftSrc, ShiftAmt}) in applyCombineTruncOfShift()
4634 Register ShiftSrc; in matchBitfieldExtractFromSExtInReg() local
4638 m_OneNonDBGUse(m_any_of(m_GAShr(m_Reg(ShiftSrc), m_ICst(ShiftImm)), in matchBitfieldExtractFromSExtInReg()
4639 m_GLShr(m_Reg(ShiftSrc), m_ICst(ShiftImm)))))) in matchBitfieldExtractFromSExtInReg()
4647 B.buildSbfx(Dst, ShiftSrc, Cst1, Cst2); in matchBitfieldExtractFromSExtInReg()
4665 Register ShiftSrc; in matchBitfieldExtractFromAnd() local
4668 m_GAnd(m_OneNonDBGUse(m_GLShr(m_Reg(ShiftSrc), m_ICst(LSBImm))), in matchBitfieldExtractFromAnd()
4685 B.buildInstr(TargetOpcode::G_UBFX, {Dst}, {ShiftSrc, LSBCst, WidthCst}); in matchBitfieldExtractFromAnd()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 2533 Register ShiftSrc; in earlySelect() local
2539 m_GOr(m_OneNonDBGUse(m_GShl(m_Reg(ShiftSrc), m_ICst(ShiftImm))), in earlySelect()
2549 emitInstr(Opc, {Dst}, {MaskSrc, ShiftSrc, Immr, Imms}, MIB); in earlySelect()
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