Searched refs:ShiftSrc (Results 1 – 4 of 4) sorted by relevance
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUISelDAGToDAG.cpp | 3421 const llvm::SDValue &ShiftSrc = In.getOperand(0); in SelectSWMMACIndex8() local 3423 if (ShiftSrc.getValueType().getSizeInBits() == 32 && ShiftAmt && in SelectSWMMACIndex8() 3426 Src = ShiftSrc; in SelectSWMMACIndex8() 3440 const llvm::SDValue &ShiftSrc = In.getOperand(0); in SelectSWMMACIndex16() local 3442 if (ShiftSrc.getValueType().getSizeInBits() == 32 && ShiftAmt && in SelectSWMMACIndex16() 3445 Src = ShiftSrc; in SelectSWMMACIndex16()
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H A D | AMDGPUInstructionSelector.cpp | 4082 Register ShiftSrc; in selectSWMMACIndex8() local 4084 if (mi_match(Src, *MRI, m_GLShr(m_Reg(ShiftSrc), m_GCst(ShiftAmt))) && in selectSWMMACIndex8() 4085 MRI->getType(ShiftSrc).getSizeInBits() == 32 && in selectSWMMACIndex8() 4088 Src = ShiftSrc; in selectSWMMACIndex8() 4104 Register ShiftSrc; in selectSWMMACIndex16() local 4106 if (mi_match(Src, *MRI, m_GLShr(m_Reg(ShiftSrc), m_GCst(ShiftAmt))) && in selectSWMMACIndex16() 4107 MRI->getType(ShiftSrc).getSizeInBits() == 32 && in selectSWMMACIndex16() 4109 Src = ShiftSrc; in selectSWMMACIndex16()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | CombinerHelper.cpp | 2706 Register ShiftSrc = ShiftMI->getOperand(1).getReg(); in applyCombineTruncOfShift() local 2707 ShiftSrc = Builder.buildTrunc(NewShiftTy, ShiftSrc).getReg(0); in applyCombineTruncOfShift() 2711 .buildInstr(ShiftMI->getOpcode(), {NewShiftTy}, {ShiftSrc, ShiftAmt}) in applyCombineTruncOfShift() 4508 Register ShiftSrc; in matchBitfieldExtractFromSExtInReg() local 4512 m_OneNonDBGUse(m_any_of(m_GAShr(m_Reg(ShiftSrc), m_ICst(ShiftImm)), in matchBitfieldExtractFromSExtInReg() 4513 m_GLShr(m_Reg(ShiftSrc), m_ICst(ShiftImm)))))) in matchBitfieldExtractFromSExtInReg() 4521 B.buildSbfx(Dst, ShiftSrc, Cst1, Cst2); in matchBitfieldExtractFromSExtInReg() 4539 Register ShiftSrc; in matchBitfieldExtractFromAnd() local 4542 m_GAnd(m_OneNonDBGUse(m_GLShr(m_Reg(ShiftSrc), m_ICst(LSBImm))), in matchBitfieldExtractFromAnd() 4559 B.buildInstr(TargetOpcode::G_UBFX, {Dst}, {ShiftSrc, LSBCst, WidthCst}); in matchBitfieldExtractFromAnd()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64InstructionSelector.cpp | 2404 Register ShiftSrc; in earlySelect() local 2410 m_GOr(m_OneNonDBGUse(m_GShl(m_Reg(ShiftSrc), m_ICst(ShiftImm))), in earlySelect() 2420 emitInstr(Opc, {Dst}, {MaskSrc, ShiftSrc, Immr, Imms}, MIB); in earlySelect()
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