Searched refs:ShiftLHS (Results 1 – 7 of 7) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PostLegalizerLowering.cpp | 863 MachineInstr *ShiftLHS = in getCmpOperandFoldingProfit() local
869 if (IsSupportedExtend(*ShiftLHS)) in getCmpOperandFoldingProfit()
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| H A D | AArch64InstructionSelector.cpp | 7752 MachineOperand &ShiftLHS = ShiftInst->getOperand(1); in selectShiftedRegister() local
7753 Register ShiftReg = ShiftLHS.getReg(); in selectShiftedRegister()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 4458 SDValue ShiftLHS = N->getOperand(0); in isDesirableToCommuteWithShift() local
4459 if (!ShiftLHS->hasOneUse()) in isDesirableToCommuteWithShift()
4461 if (ShiftLHS.getOpcode() == ISD::SIGN_EXTEND && in isDesirableToCommuteWithShift()
4462 !ShiftLHS.getOperand(0)->hasOneUse()) in isDesirableToCommuteWithShift()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 1089 SDValue ShiftLHS = N->getOperand(0); in isDesirableToCommuteWithShift() local
1090 if (!ShiftLHS->hasOneUse()) in isDesirableToCommuteWithShift()
1093 if (ShiftLHS.getOpcode() == ISD::SIGN_EXTEND && in isDesirableToCommuteWithShift()
1094 !ShiftLHS.getOperand(0)->hasOneUse()) in isDesirableToCommuteWithShift()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 17917 SDValue ShiftLHS = N->getOperand(0); in isDesirableToCommuteWithShift() local
17920 if (!ShiftLHS->hasOneUse()) in isDesirableToCommuteWithShift()
17923 if (ShiftLHS.getOpcode() == ISD::SIGN_EXTEND && in isDesirableToCommuteWithShift()
17924 !ShiftLHS.getOperand(0)->hasOneUse()) in isDesirableToCommuteWithShift()
17930 if (ShiftLHS.getOpcode() == ISD::AND && (VT == MVT::i32 || VT == MVT::i64) && in isDesirableToCommuteWithShift()
17931 isa<ConstantSDNode>(ShiftLHS.getOperand(1))) { in isDesirableToCommuteWithShift()
17932 uint64_t TruncMask = ShiftLHS.getConstantOperandVal(1); in isDesirableToCommuteWithShift()
17934 SDValue AndLHS = ShiftLHS.getOperand(0); in isDesirableToCommuteWithShift()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 31578 unsigned ShiftLHS = IsROTL ? ISD::SHL : ISD::SRL; in LowerRotate() local
31592 DAG.getNode(ShiftLHS, DL, VT, R, DAG.getConstant(4, DL, VT)), in LowerRotate()
31602 DAG.getNode(ShiftLHS, DL, VT, R, DAG.getConstant(2, DL, VT)), in LowerRotate()
31612 DAG.getNode(ShiftLHS, DL, VT, R, DAG.getConstant(1, DL, VT)), in LowerRotate()
56603 SDValue ShiftLHS = Src.getOperand(0); in combineMOVMSK() local
56608 ShiftLHS = DAG.getBitcast(ShiftVT, ShiftLHS); in combineMOVMSK()
56611 ShiftLHS = getTargetVShiftByConstNode(X86ISD::VSHLI, DL, ShiftVT, in combineMOVMSK()
56612 ShiftLHS, ShiftAmt, DAG); in combineMOVMSK()
56615 ShiftLHS = DAG.getBitcast(SrcVT, ShiftLHS); in combineMOVMSK()
56617 SDValue Res = DAG.getNode(ISD::XOR, DL, SrcVT, ShiftLHS, ShiftRHS); in combineMOVMSK()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 13873 SDValue ShiftLHS = N->getOperand(0); in isDesirableToCommuteWithShift() local
13874 if (!ShiftLHS->hasOneUse()) in isDesirableToCommuteWithShift()
13877 if (ShiftLHS.getOpcode() == ISD::SIGN_EXTEND && in isDesirableToCommuteWithShift()
13878 !ShiftLHS.getOperand(0)->hasOneUse()) in isDesirableToCommuteWithShift()
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